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Hardware-Aware Performance Evaluation for the Co-Design of Image Sensors and Vision Algorithms

Opened Access Hardware-Aware Performance Evaluation for the Co-Design of Image Sensors and Vision Algorithms
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Autor: Villegas Pachón, C.
Carmona Galán, Ricardo
Fernández Berni, Jorge
Rodríguez Vázquez, Ángel Benito
Departamento: Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo
Fecha: 2016
Tipo de documento: Ponencia
Resumen: The top-down approach to system design allows obtaining separate specifications for each subsystem. In the case of vision systems, this means propagating system-level specifications down to particular specifications for e. g. the image sensor, the image processor, etc. This permits to adopt different design strategies for each one of them, as long as they meet their own specifications. This approach can lead to over-design, which is not always affordable. Conversely, if higher-level specifications are too tight, they can lead to impossible specifications at the lower levels. This is certainly the case for embedded vision systems in which high-performance needs to be paired with a very restricted power budget. In order to explore alternative architectures, we need tools that allow for simultaneous optimization of different blocks. However, the link between low-level non-idealities and high-level performance is missing. CAD tools for the design and verification of analog and mixed-signa...
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Tamaño: 752.0Kb
Formato: PDF

URI: https://hdl.handle.net/11441/74379

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