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dc.creatorDelgado Restituto, Manueles
dc.creatorRodríguez Pérez, Albertoes
dc.creatorDarie, Ángelaes
dc.creatorSoto Sánchez, Cristinaes
dc.creatorFernández Jover, Eduardoes
dc.creatorRodríguez Vázquez, Ángel Benitoes
dc.date.accessioned2018-04-12T13:29:01Z
dc.date.available2018-04-12T13:29:01Z
dc.date.issued2017
dc.identifier.citationDelgado Restituto, M., Rodríguez Pérez, A., Darie, Á., Soto Sánchez, C., Fernández Jover, E. y Rodríguez Vázquez, Á.B. (2017). System-Level Design of a 64-Channel Low Power Neural Spike Recording Sensor. IEEE Transactions on Biomedical Circuits and Systems, 11, 420-433.
dc.identifier.issn1932-4545es
dc.identifier.urihttps://hdl.handle.net/11441/72612
dc.description.abstractThis paper reports an integrated 64-channel neural spike recording sensor, together with all the circuitry to process and configure the channels, process the neural data, transmit via a wireless link the information and receive the required instructions. Neural signals are acquired, filtered, digitized and compressed in the channels. Additionally, each channel implements an auto-calibration algorithm which individually configures the transfer characteristics of the recording site. The system has two transmission modes; in one case the information captured by the channels is sent as uncompressed raw data; in the other, feature vectors extracted from the detected neural spikes are released. Data streams coming from the channels are serialized by the embedded digital processor. Experimental results, including in vivo measurements, show that the power consumption of the complete system is lower than 330 μW.es
dc.description.sponsorshipMinisterio de Economía y Competitividad TEC2016-80923-Pes
dc.description.sponsorshipONR N000141110312es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherInstitute of Electrical and Electronics Engineerses
dc.relation.ispartofIEEE Transactions on Biomedical Circuits and Systems, 11, 420-433.
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectSpike detectiones
dc.subjectNeural recordinges
dc.subjectFeature extractiones
dc.subjectNeural prosthesies
dc.subjectBrain-Machine Interfaces (BMI)es
dc.titleSystem-Level Design of a 64-Channel Low Power Neural Spike Recording Sensores
dc.typeinfo:eu-repo/semantics/articlees
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Electrónica y Electromagnetismoes
dc.relation.projectIDTEC2016-80923-Pes
dc.relation.projectIDN000141110312es
dc.relation.publisherversionhttp://dx.doi.org/10.1109/TBCAS.2016.2618319es
dc.identifier.doi10.1109/TBCAS.2016.2618319es
idus.format.extent15 p.es
dc.journaltitleIEEE Transactions on Biomedical Circuits and Systemses
dc.publication.volumen11es
dc.publication.initialPage420es
dc.publication.endPage433es
dc.contributor.funderMinisterio de Economía y Competitividad (MINECO). España
dc.contributor.funderOffice of Naval Research (ONR). United States

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