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Design and implementation of a suitable core for on-chip long-term verification

 

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Opened Access Design and implementation of a suitable core for on-chip long-term verification
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Author: Viejo Cortés, Julián
Villar de Ossorno, José Ignacio
Juan Chico, Jorge
Millán Calderón, Alejandro
Bellido Díaz, Manuel Jesús
Ostúa Aranguena, Enrique
Department: Universidad de Sevilla. Departamento de Tecnología Electrónica
Date: 2010
Published in: International Symposium on Industrial Embedded Systems, SIES 2010 (2010), p 234-237
ISBN/ISSN: 978-1-4244-5839-4
Document type: Presentation
Abstract: Traditional on-chip and off-chip logic analyzers present important shortcomings when used for the long-term verification of industrial embedded systems, forcing the designer to implement ad-hoc verification solutions. This contribution presents a suitable solution for long-term verification of FPGAbased designs consisting on a verification core that uses the Picoblaze microcontroller, dedicated logic and a serial port communication in order to monitor the internal signals of the system in a continuous way. The core design focuses on low resource requirements and reusability and has been successfully applied to the verification of a real industrial synchronization platform showing remarkable advantages over commercial onchip solutions like Xilinx’s ChipScope Pro.
Cite: Viejo Cortés, J., Villar de Ossorno, J.I., Juan Chico, J., Millán Calderón, A., Bellido Díaz, M.J. y Ostúa Aranguena, E. (2010). Design and implementation of a suitable core for on-chip long-term verification. En International Symposium on Industrial Embedded Systems, SIES 2010 (234-237), Trento, Italia: IEEE Computer Society.
Size: 285.3Kb
Format: PDF

URI: http://hdl.handle.net/11441/52637

DOI: 10.1109/SIES.2010.5551400

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