Repositorio de producción científica de la Universidad de Sevilla

Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates

 

Advanced Search
 
Opened Access Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates
Cites

Show item statistics
Icon
Export to
Author: Millán Calderón, Alejandro
Juan Chico, Jorge
Bellido Díaz, Manuel Jesús
Guerrero Martos, David
Ruiz de Clavijo Vázquez, Paulino
Viejo Cortés, Julián
Department: Universidad de Sevilla. Departamento de Tecnología Electrónica
Date: 2008
Published in: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2008. Lecture Notes in Computer Science, vol 5349
ISBN/ISSN: 978-3-540-95947-2
0302-9743
Document type: Chapter of Book
Abstract: Power modeling techniques have traditionally neglected the main part of the energy consumed in the internal nodes of static CMOS gates: the power dissipated by input transitions that do not produce output switching. In this work, we present an experimental set-up that shows that this power component may contribute up to 59% of the total power consumption of a gate in modern technologies. This fact makes very important to include it into any accurate power model
Size: 1.581Mb
Format: PDF

URI: http://hdl.handle.net/11441/52628

DOI: 10.1007/978-3-540-95948-9_39

See editor´s version

This work is under a Creative Commons License: 
Attribution-NonCommercial-NoDerivatives 4.0 Internacional

This item appears in the following Collection(s)