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Static Power Consumption in CMOS Gates Using Independent Bodies


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Opened Access Static Power Consumption in CMOS Gates Using Independent Bodies

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Author: Guerrero Martos, David
Millán Calderón, Alejandro
Juan Chico, Jorge
Bellido Díaz, Manuel Jesús
Ruiz de Clavijo Vázquez, Paulino
Ostúa Aranguena, Enrique
Viejo Cortés, Julián
Department: Universidad de Sevilla. Departamento de Tecnología Electrónica
Date: 2007
Published in: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2007. Lecture Notes in Computer Science, vol 4644
ISBN/ISSN: 978-3-540-74441-2
Document type: Chapter of Book
Abstract: It has been reported that the use of independent body terminals for series transistors in static bulk-CMOS gates improves their timing and dynamic power characteristics. In this paper, the static power consumption of gates using this approach is addressed. When compared to conventional common body static CMOS, important static power enhancements are obtained. Accurate electrical simulation results reveals improvements up to 35% and 62% in NAND and NOR gates respectively.
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Format: PDF


DOI: 10.1007/978-3-540-74442-9_39

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