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Design of a FFT/IFFT module as an IP core suitable for embedded systems

 

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Opened Access Design of a FFT/IFFT module as an IP core suitable for embedded systems
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Author: Viejo Cortés, Julián
Millán Calderón, Alejandro
Bellido Díaz, Manuel Jesús
Juan Chico, Jorge
Ruiz de Clavijo Vázquez, Paulino
Guerrero Martos, David
Ostúa Aranguena, Enrique
Muñoz, A.
Department: Universidad de Sevilla. Departamento de Tecnología Electrónica
Date: 2007
Published in: Symposium on Industrial Embedded Systems Proceedings, SIES 2007 (2007), p 337-340
ISBN/ISSN: 1-4244-0839-3
2150-3109
Document type: Presentation
Abstract: In this work, we have laid the foundations that allow us to accomplish the implementation of a FFT/IFFT module as an IP core. The main objective is to design a configurable optimized core that can be integrated as a standard peripheral of a microprocessor system. Thus, three different methodologies have been compared: VHDL coding, System-level tools at RT level, and System-level tools at macroblock level; in order to propose a general methodology that facilitates the design process as well as allows designers to maintain total control over the module internal architecture.
Cite: Viejo Cortés, J., Millán Calderón, A., Bellido Díaz, M.J., Juan Chico, J., Ruiz de Clavijo Vázquez, P., Guerrero Martos, D.,...,Muñoz, A. (2007). Design of a FFT/IFFT module as an IP core suitable for embedded systems. En Symposium on Industrial Embedded Systems Proceedings, SIES 2007 (337-340), Lisboa, Portugal: IEEE Computer Society.
Size: 885.0Kb
Format: PDF

URI: http://hdl.handle.net/11441/52580

DOI: 10.1109/SIES.2007.4297356

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