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dc.creatorIndiveri, Giacomo es
dc.creatorLinares Barranco, Bernabé es
dc.creatorMasquelier, T. es
dc.creatorSerrano Gotarredona, María Teresa es
dc.creatorProdromakis, T. es
dc.date.accessioned2015-02-27T12:12:33Z
dc.date.available2015-02-27T12:12:33Z
dc.date.issued2013es
dc.identifier.issn1662-453Xes
dc.identifier.otherhttp://digital.csic.es/bitstream/10261/83694/1/STDP%20and%20STDP.pdfes
dc.identifier.urihttp://hdl.handle.net/11441/22812
dc.description.abstractIn this paper we review several ways of realizing asynchronous Spike-Timing-DependentPlasticity (STDP) using memristors as synapses. Our focus is on how to use individual memristors to implement synaptic weight multiplications, in a way such that it is not necessary to (a) introduce global synchronization and (b) to separate memristor learning phases from memristor performing phases. In the approaches described, neurons fire spikes asynchronously when they wish and memristive synapses perform computation and learn at their own pace, as it happens in biological neural systems. We distinguish between two different memristor physics, depending on whether they respond to the original “moving wall” or to the “filament creation and annihilation” models. Independent of the memristor physics, we discuss two different types of STDP rules that can be implemented with memristors: either the pure timing-based rule that takes into account the arrival time of the spikes from the pre- and the post-synaptic neurons, or a hybrid rule that takes into account only the timing of pre-synaptic spikes and the membrane potential and other state variables of the post-synaptic neuron. We show how to implement these rules in cross-bar architectures that comprise massive arrays of memristors, and we discuss applications for artificial vision.en
dc.language.isoenges
dc.relation.ispartofFrontiers in Neuroscience, 18es
dc.rightsAtribución-NoComercial-SinDerivadas 4.0 Españaes
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0es
dc.titleSTDP and STDP Variations with Memristors for Spiking Neuromorphic Learning Systemses
dc.typeinfo:eu-repo/semantics/articlees
dcterms.identifierhttps://ror.org/03yxnpp24
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadoreses
dc.identifier.doihttp://dx.doi.org/10.3389/fnins.2013.00002
dc.identifier.idushttps://idus.us.es/xmlui/handle/11441/22812

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