Now showing items 1-2 of 2

    • IconAsymmetric clock driver for improved power and noise performances  [Presentation]

      Castro, Javier; Parra Fernández, María del Pilar; Valencia Barrero, Manuel; Acosta Jiménez, Antonio José (IEEE Computer Society, 2007)
      One of the most important sources of switching noise and power consumption in large VLSI circuits is the clock generation and distribution tree. This paper analyzes how the use of an asymmetric clock can be an ...
    • IconSelective Clock-Gating for Low Power/Low Noise Synchronous Counters  [Presentation]

      Parra Fernández, María del Pilar; Acosta Jiménez, Antonio José; Valencia Barrero, Manuel (Springer, 2002)
      The objective of this paper is to explore the applicability of clock gating techniques to binary counters in order to reduce the power consumption as well as the switching noise generation. A measurement methodology to ...