Now showing items 1-5 of 5

    • IconASIC-in-the-loop methodology for verification of piecewise affine controllers  [Presentation]

      Martínez Rodríguez, Macarena Cristina; Brox Jiménez, Piedad; Castro, Javier; Tena Sánchez, Erica; Acosta Jiménez, Antonio José; Baturone Castillo, María Iluminada (Institute of Electrical and Electronics Engineers, 2012)
      This paper exposes a hardware-in-the-loop metho- dology to verify the performance of a programmable and confi- gurable application specific integrated circuit (ASIC) that imple- ments piecewise affine (PWA) controllers. ...
    • IconCircuit implementation of piecewise-affine functions based on lattice representation  [Presentation]

      Martínez Rodríguez, Macarena Cristina; Baturone Castillo, María Iluminada; Brox Jiménez, Piedad (Institute of Electrical and Electronics Engineers, 2011)
      This paper introduces a digital architecture to implement piecewise-affine (PWA) functions based on representation methods from the lattice theory. Given an explicit and continuous PWA function, the parameters required to ...
    • IconDedicated hardware IP module for extracting singular points from fingerprints  [Presentation]

      Martínez Rodríguez, Macarena Cristina; Arjona, Rosario; Brox Jiménez, Piedad; Baturone Castillo, María Iluminada (Institute of Electrical and Electronics Engineers, 2014)
      In this paper a new digital dedicated hardware IP module for extracting singular points from fingerprints is presented (in particular convex cores). This module comprises four main blocks that implement an image directional ...
    • IconDigital implementation of hierarchical piecewise-affine controllers  [Presentation]

      Baturone Castillo, María Iluminada; Martínez Rodríguez, Macarena Cristina; Brox Jiménez, Piedad; Gersnoviez, A.; Sánchez Solano, Santiago (Institute of Electrical and Electronics Engineers, 2011)
      This paper proposes the design of hierarchical piecewise-affine (PWA) controllers to alleviate the processing time or prohibitive memory requirements of large controller structures. The constituent PWA modules of the ...
    • IconReducing bit flipping problems in SRAM physical unclonable functions for chip identification  [Presentation]

      Eiroa, Susana; Castro, J.; Martínez Rodríguez, Macarena Cristina; Tena Sánchez, Erica; Brox Jiménez, Piedad; Baturone Castillo, María Iluminada (Institute of Electrical and Electronics Engineers, 2012)
      Physical Unclonable functions (PUFs) have appeared as a promising solution to provide security in hardware. SRAM PUFs offer the advantage, over other PUF constructions, of reusing resources (memories) that already exist ...