Investigación
https://hdl.handle.net/11441/10690
2018-06-23T10:20:27ZSorting networks implemented as νMOS circuits
https://hdl.handle.net/11441/76406
Sorting networks implemented as νMOS circuits
A new realisation for n-input sorters is presented. Resorting to the neuron-MOS (νMOS) concept and to an adequate electrical scheme, a compact and efficient implementation is obtained.
1998-01-01T00:00:00ZAER image filtering architecture for vision-processing systems
https://hdl.handle.net/11441/76405
AER image filtering architecture for vision-processing systems
A VLSI architecture is proposed for the realization of real-time two-dimensional (2-D) image filtering in an address-event-representation (AER) vision system. The architecture is capable of implementing any convolutional kernel F(x,y) as long as it is decomposable into x-axis and y-axis components, i.e., F(x, y) = H(x)V(y), for some rotated coordinate system {x, y} and if this product can be approximated safely by a signed minimum operation. The proposed architecture is intended to be used in a complete vision system, known as the boundary contour system and feature contour system (BCS-FCS) vision model, proposed by Grossberg and collaborators. The present paper proposes the architecture, provides a circuit implementation using MOS transistors operated in weak inversion, and shows behavioral simulation results at the system level operation and some electrical simulations.
1999-01-01T00:00:00ZA programmable VLSI filter architecture for application in real-time vision processing systems
https://hdl.handle.net/11441/76404
A programmable VLSI filter architecture for application in real-time vision processing systems
An architecture is proposed for the realization of real-time edge-extraction filtering operation in an Address-Event-Representation (AER) vision system. Furthermore, the approach is valid for any 2D filtering operation as long as the convolutional kernel F(p,q) is decomposable into an x-axis and a y-axis component, i.e. F(p,q)=H(p)V(q), for some rotated coordinate system [p,q]. If it is possible to find a coordinate system [p,q], rotated with respect to the absolute coordinate system a certain angle, for which the above decomposition is possible, then the proposed architecture is able to perform the filtering operation for any angle we would like the kernel to be rotated. This is achieved by taking advantage of the AER and manipulating the addresses in real time. The proposed architecture, however, requires one approximation: the product operation between the horizontal component H(p) and vertical component V(q) should be able to be approximated by a signed minimum operation without significant performance degradation. It is shown that for edge-extraction applications this filter does not produce performance degradation. The proposed architecture is intended to be used in a complete vision system known as the Boundary-Contour-System and Feature-Contour-System Vision Model, proposed by Grossberg and collaborators. The present paper proposes the architecture, provides a circuit implementation using MOS transistors operated in weak inversion, and shows behavioral simulation results at the system level operation and electrical simulation and experimental results at the circuit level operation of some critical subcircuits.
2000-01-01T00:00:00ZA general translinear principle for subthreshold MOS transistors
https://hdl.handle.net/11441/76403
A general translinear principle for subthreshold MOS transistors
This paper revises the conditions under which the translinear principle can be fully exploited for MOS transistors operating in subthreshold. Due to the exponential nature of subthreshold MOS transistors, the translinear principle applies immediately as long as the source-to-bulk voltages are made equal to zero (or constant). This paper addresses the conditions under which subthreshold MOS transistors still satisfy a translinear principle, but without imposing this constraint on all VBS voltages. It is found that the translinear principle results in a more general formulation than the originally found for BJT's since now multiple translinear loops can be involved. The constraint of an even number of transistors is no longer necessary. Some corollaries are stated as well and, finally, it is shown how to use the theorem for subthreshold MOS transistors operated in the ohmic regime.
1999-01-01T00:00:00Z