Now showing items 1-8 of 8

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      A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator  [Presentation]

      García González, José Manuel; Escalera Morón, Sara; Rosa Utrera, José Manuel de la; Guerra Vinuesa, Oscar; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004)
      This paper describes the design and electrical implementation of an A/D interface for sensor applications realized in a 0.35μm standard CMOS technology. The circuit is composed of a low-noise instrumentation preamplifier ...
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      A CMOS 110-dB@40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-selta modulator for low-power high-linearity automotive aensor ASICs  [Article]

      Rosa Utrera, José Manuel de la; Escalera, Sara; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Guerra Vinuesa, Oscar; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2005)
      This paper describes a 0.35-μm CMOS chopper-stabilized switched-capacitor 2-1 cascade ΣΔ modulator for automotive sensor interfaces. The modulator architecture has been selected from an exhaustive comparison among multiple ...
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      A hierarchical approach for the symbolic analysis of large analog integrated circuits  [Presentation]

      Guerra Vinuesa, Oscar; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (IEEE computer society digital library, 2000)
      This paper introduces a new hierarchical analysis methodology which incorporates approximation strategies during the analysis process. Consequently, the circuit sizes that can be analyzed increase dramatically, ...
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      An accurate error control mechanism for simplification before generation algorithms  [Presentation]

      Guerra Vinuesa, Oscar; Rodríguez García, Juan D.; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1999)
      The use of simplification before generation techniques to enable the approximate symbolic analysis of large analog circuits is discussed. This paper introduces an error control mechanism to drive the circuit reduction, ...
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      An Alternative DfT Methodology to Test High-Resolution ΣΔ Modulators  [Presentation]

      Escalera, Sara; García González, José Manuel; Guerra Vinuesa, Oscar; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004)
      In this paper, a novel DfT methodology to test high-resolution ΣΔ Modulators (ΣΔM) is introduced. The aim of the proposal is to reduce the test time required by conventional methodologies without degrading the accuracy of ...
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      Effects of capacitors non-idealities in un-even split-capacitor array SAR ADCs  [Presentation]

      Fiorelli, Rafaella; Guerra Vinuesa, Oscar; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016)
      This paper studies the effects of capacitors non-idealities in the performance of un-even split-capacitor SAR ADCs. Also, election of the m and l bits of MSB and LSB capacitors banks, respectively, is studied to reduce ...
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      Selection of test techniques for high-resolution ΣΔ modulators  [Presentation]

      Guerra Vinuesa, Oscar; Escalera, Sara; Rosa Utrera, José Manuel de la; Compaigne, Eric; Galliard, Christophe; Rodríguez Vázquez, Ángel Benito (2000)
      This paper introduces a new tool which allows the evaluation of different test techniques in a complete impartial manner. This tool has been applied to the selection of the best test technique for their application to ...
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      Symbolic analysis of large analog integrated circuits: the numerical reference generation problem  [Chapter of Book]

      Fernández Fernández, Francisco Vidal; Guerra Vinuesa, Oscar; Rodríguez García, Juan D.; Rodríguez Vázquez, Ángel Benito (IEEE press, 1998)
      Symbolic analysis potentialities for gaining circuit insight and for efficient repetitive evaluations have been limited by the exponential increase of formula complexity with the circuit size. This drawback has began to ...