Now showing items 1-13 of 13

    • IconA 176x120 pixel CMOS vision chip for gaussian filtering with massivelly parallel CDS and A/D-conversion  [Presentation]

      Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Cabello, D.; Fernández Berni, Jorge; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito (IEEE press, 2013)
      This paper conveys a proof-of-concept chip for Gaussian pyramid generation for image feature detectors. Gaussian filtering and image resizing are performed with a switched capacitor (SC) network. The chip is conceived as ...
    • IconA 3-D Chip Architecture for Optical Sensing and Concurrent Processing  [Article]

      Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Domínguez Matas, Carlos; Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Pozas, Francisco; Liñán Cembrano, Gustavo; Foldessy, Peter; Zarandy, Akos; Rekeczky, Csaba (SPIE, 2010)
      This paper presents an architecture for the implementation of vision chips in 3-D integration technologies. This architecture employs the multi-functional pixel concept to achieve full parallel processing of the information ...
    • IconA CMOS-3D reconfigurable architecture with in-pixel processing for feature detectors  [Presentation]

      Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Pardo, F.; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012)
      This paper introduces a two-tier CMOS-3D architecture for generation of Gaussian pyramids, detection of extrema, and calculation of spatial derivatives in an image. Such tasks are included in modern feature detectors, which ...
    • IconCMOS-3D smart imager architectures for feature detection  [Article]

      Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Fernández Berni, Jorge; Carmona Galán, Ricardo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012)
      This paper reports a multi-layered smart image sensor architecture for feature extraction based on detection of interest points. The architecture is conceived for 3-D integrated circuit technologies consisting of two layers ...
    • IconForm Factor Improvement of Smart-Pixels for Vision Sensors through 3-D Vertically- Integrated Technologies  [Presentation]

      Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Fernández Berni, Jorge; Vargas Sierra, Sonia; Leñero Bardallo, Juan Antonio; Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Pérez Verdú, Belén (Institute of Electrical and Electronics Engineers, 2014)
      While conventional CMOS active pixel sensors embed only the circuitry required for photo-detection, pixel addressing and voltage buffering, smart pixels incorporate also circuitry for data processing, data storage and ...
    • IconGaussian Pyramid Extraction with a CMOS Vision Sensor  [Presentation]

      Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Fernández Berni, Jorge; Carmona Galán, Ricardo; Cabello, D.; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2014)
      This paper addresses a CMOS vision sensor with 176 × 120 pixels in standard 0.18 μm CMOS technology that computes the Gaussian pyramid. The Gaussian pyramid is extracted with a double-Euler switched-capacitor network, ...
    • IconImage Feature Extraction Acceleration  [Chapter of Book]

      Fernández Berni, Jorge; Suárez Cambre, Manuel; Carmona Galán, Ricardo; Brea Sánchez, Víctor Manuel; Río Fernández, Rocío del; Cabello, D.; Rodríguez Vázquez, Ángel Benito (Springer, 2016)
      Image feature extraction is instrumental for most of the best-performing algorithms in computer vision. However, it is also expensive in terms of computational and memory resources for embedded systems due to the need of ...
    • IconIn-pixel ADC for a vision architecture on CMOS-3D technology  [Presentation]

      Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Domínguez Matas, Carlos; Carmona Galán, Ricardo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2010)
      This paper addresses the design of an 8-bit single-slope in-pixel ADC for a 3D chip architecture intended for airborne surveillance and reconnaissance applications. The 3D chip architecture comprises a sensor layer with a ...
    • IconIn-pixel generation of gaussian pyramid images by block reusing in 3D-CMOS  [Presentation]

      Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Cabello, D.; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012)
      This paper introduces an architecture of a switched-capacitor network for Gaussian pyramid generation. Gaussian pyramids are used in modern scale- and rotation-invariant feature detectors or in visual attention. Our ...
    • IconLive Demonstration: Gaussian Pyramid Extraction with a CMOS Vision Sensor  [Presentation]

      Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Fernández Berni, Jorge; Carmona Galán, Ricardo; Cabello, D.; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2015)
      This live demonstration showcases the Gaussian pyramid with a CMOS vision sensor. The chip features a 176 120 pixel array in standard 0.18 m CMOS technology. The sensing elements are designed as 3-Transistor Active Pixel ...
    • IconLow-Power CMOS Vision Sensor for Gaussian Pyramid Extraction  [Article]

      Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Fernández Berni, Jorge; Carmona Galán, Ricardo; Cabello, D.; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2017)
      This paper introduces a CMOS vision sensor chip in a standard 0.18 μm CMOS technology for Gaussian pyramid extraction. The Gaussian pyramid provides computer vision algorithms with scale invariance, which permits having ...
    • IconOffset-compensated comparator with full-input range in 150nm FDSOI CMOS-3d technology  [Presentation]

      Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Domínguez Matas, Carlos; Carmona Galán, Ricardo; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2010)
      This paper addresses an offset-compensated comparator with full-input range in the 150nm FDSOI CMOS- 3D technology from MIT- Lincoln Laboratory. The comparator discussed here makes part of a vision system. Its architecture ...
    • IconSwitched-capacitor networks for scale-space generation  [Presentation]

      Suárez Cambre, Manuel; Brea Sánchez, Víctor Manuel; Cabello, D.; Pozas Flores, Francisco; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2011)
      In scale-space filtering signals are represented at several scales, each conveying different details of the original signal. Every new scale is the result of a smoothing operator on a former scale. In image processing, ...