Domínguez Castro, RafaelEspejo Meana, Servando CarlosRodríguez Vázquez, Ángel BenitoCarmona Galán, Ricardo2020-04-202020-04-201997Domínguez Castro, R., Espejo Meana, S.C., Rodríguez Vázquez, Á.B. y Carmona Galán, R. (1997). A one-transistor-synapse strategy for electrically-programmable massively-parallel analog array processors. En 2nd IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design (117-122), Baveno, Italia: Institute of Electrical and Electronics Engineers.0-7803-4240-2https://hdl.handle.net/11441/95484This paper presents a linear, four-quadrants, electrically-programmable, one-transistor synapse strategy applicable to the implementation of general massively-parallel analog processors in CMOS technology. It is specially suited for translationally-invariant processing arrays with local connectivity, and results in a significant reduction in area occupation and power dissipation of the basic processing units. This allows higher integration densities and therefore, permits the integration of larger arrays on a single chip.application/pdf6 p.engAttribution-NonCommercial-NoDerivatives 4.0 Internacionalhttp://creativecommons.org/licenses/by-nc-nd/4.0/info:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/openAccesshttps://doi.org/10.1109/AMICD.1997.637203