Viejo Cortés, JuliánJuan Chico, JorgeBellido Díaz, Manuel JesúsMillán Calderón, AlejandroRuiz de Clavijo Vázquez, Paulino2017-01-252017-01-252011Viejo Cortés, J., Juan Chico, J., Bellido Díaz, M.J., Millán Calderón, A. y Ruiz de Clavijo Vázquez, P. (2011). Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation. IEEE Transactions on Instrumentation and Measurement, 60 (12), 3961-3963.0018-9456http://hdl.handle.net/11441/52740Discrete microprocessor-based equipment is a typical synchronization system on the market which implements the most critical features of the synchronization protocols in hardware and the synchronization algorithms in software. In this paper, a new clock discipline algorithm for hardware implementation is presented, allowing for full hardware implementation of synchronization systems. Measurements on field-programmable gate array prototypes show a fast convergence time (below 10 s) and a high accuracy (1 μs) for typical configuration parameters.application/pdfengAttribution-NonCommercial-NoDerivatives 4.0 Internacionalhttp://creativecommons.org/licenses/by-nc-nd/4.0/Field-programmable gate arrayhardware timestampingNetwork Time Protocol (NTP)Precision Time Protocol (PTP)synchronization systeminfo:eu-repo/semantics/articleinfo:eu-repo/semantics/openAccesshttps://doi.org/10.1109/TIM.2011.2164828