Rodríguez Vázquez, Ángel Benito2025-05-132025-05-132025-01-15Segovia de la Torre, J.Á. (2025). Design Contributions to high-end low-noise CMOS image Sensors. (Tesis Doctoral Inédita). Universidad de Sevilla, Sevilla.https://hdl.handle.net/11441/172640This Thesis provides a new readout architecture able to meet two of the most demanding specifications in image sensor: low noise and speed. The proposed low-noise readout channel based on two stages of ADC: Incremental ADC and Single-Slope ADC. The Chapter also shows the functional and implementation descriptions and noise analysis for every ADC stage. The readout channel can operate with internal analog CDS and external digital CDS. The presented readout channel provides 1.3 eRMS noise images with a conversion time shorter than five microseconds, with the availability of exchange precision and speed achieving 0.7 eRMS when extending the time up to 80 microseconds. Additionally, a pixel optimization procedure has been developed based on experimental data and a model to extrapolate the empirical data to the expected performances with the new readout architecture. On top of that, an architecture modification for the readout channel is provided to work with dual conversion gain pixels in order to provide high dynamic range images. It has been proved, that the readout channel is valid for large scale wafer devices and one reticle devices, two prototypes are described with the readout channel described in this Thesis. In these prototypes, not only the readout feature are described, but also other techniques to reduce glow effect, improve yield and the readout calibration process. Finally, a bench mark is provided to show a comparison of the noise speed comparison with other publications in the state of the art showing the benefits of the proposed architecture. During the development and characterization of those image sensor prototypes important milestones have been addressed as follows: Glow Effect: The glow is a limiting phenomenon that doesn’t allow reducing the dark current when cooling the image sensor even with negatives temperatures. In this thesis a process fabrication and a methodology has been developed to minimize at very low levels the glow contribution. Yield improvements: This point is important specially for wafer scale large image sensors, where one defect in the wafer means a defective device. A scalable repairing circuitry has been proposed and incorporated in the image sensor to improve yield. Quantum efficiency: Very high quantum efficiency has been achieved using BSI devices. It is remarkable the lack of etaloning. Operation Modes: multiple operation modes and functions are implemented to increment the image sensor flexibility and to provide a tailored operation mode for each application. Finally, a benchmark comparison of this work with other contributions in the state-of-the-art has been developed. This benchmark shows the image sensor and readout channel provide very low noise results at high-speed considering a very appropriate option for the low noise applications. In fact, the readout noise is providing very low noise, and then if we were able to provide with a better pixel in terms of noise, the resultant image sensor would provide better performances with any change in the readout channel.application/pdf174 p.engAttribution-NonCommercial-NoDerivatives 4.0 Internationalhttp://creativecommons.org/licenses/by-nc-nd/4.0/info:eu-repo/semantics/doctoralThesisinfo:eu-repo/semantics/openAccess