2017-01-192017-01-192001Ruiz de Clavijo Vázquez, P., Juan Chico, J., Bellido Díaz, M.J., Acosta Jiménez, A.J. y Valencia Barrero, M. (2001). HALOTIS: high accuracy LOgic TIming simulator with inertial and degradation delay model. En Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001 (467-471), Munich, Germany: IEEE Computer Society.0-7695-0993-21530-1591http://hdl.handle.net/11441/52463This communication presents HALOTIS, a novel high accuracy logic timing simulation tool, that incorporates a new simulation algorithm based on different concepts for transitions and events. This new simulation algorithm is intended for including the inertial and degradation delay models. Simulation results are very similar to those obtained by electrical simulators, and show a higher accuracy compared to conventional delay models implemented in current logic simulators.application/pdfengAttribution-NonCommercial-NoDerivatives 4.0 Internacionalhttp://creativecommons.org/licenses/by-nc-nd/4.0/HALOTIS: high accuracy LOgic TIming simulator with inertial and degradation delay modelinfo:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/openAccess10.1109/DATE.2001.915065