2015-11-252015-11-252002-08-27Millán Calderón, A., Juan Chico, J., Bellido Díaz, M.J., Ruiz de Clavijo Vázquez, P. y Guerrero Martos, D. (2002). Characterization of Normal Propagation Delay for Delay Degradation Model (DDM). Lecture Notes in Computer Science, 2451, 477-486.0302-9743http://hdl.handle.net/11441/3100012th International Workshop, PATMOS: : International Workshop on Power and Timing Modeling, Optimization and Simulation, Seville, Spain, September 11–13, 2002 ISBN: 978-3-540-44143-4In previous papers we have presented a very accurate model that handles the generation and propagation of glitches, which makes an important headway in logic timing simulation. This model is called Delay Degradation Model (DDM). Characterizing DDM completely also implies the characterization of the normal propagation delay. In this paper, we propose a simple heuristic model that includes its dependence on the output load and the input transition time. We have tested this model and found a mean deviation lower than 4%. Also, we present a characterization process for this model that is fully integrated into AUTODDM without affecting the total simulation time needed to characterize a standard cell.application/pdfenghttp://creativecommons.org/licenses/by-nc-nd/4.0/digital circuitCMOSpropagation delayglitchDelay Degradation Model (DDM)info:eu-repo/semantics/articleinfo:eu-repo/semantics/openAccess10.1007/3-540-45716-X_48https://idus.us.es/xmlui/handle/11441/31000