García Sánchez, GerardoRosa Utrera, José Manuel de la2018-05-152018-05-152014García Sánchez, G. y Rosa Utrera, J.M.d.L. (2014). Efficient Hybrid Continuous-Time/Discrete-Time Cascade Modulators for Wideband Applications. Microelectronics Journal, 45 (10), 1234-1246.0026-2692https://hdl.handle.net/11441/74633This paper analyses the use of hybrid continuous-time/discrete-time cascade ΣΔ modulators for the implementation of power-efficient analog-to-digital converters in broadband wireless communication systems. Two alternative implementations of multi-rate cascade architectures are studied and compared with conventional single-rate continuous-time topologies, taking into account the impact of main circuit-level error mechanisms, namely: mismatch, finite dc gain and gain-bandwidth product. In all cases, closed-form design equations are derived for the nonideal in-band noise power of all ΣΔ modulators under study, providing analytical relationships between their system-level performance and the corresponding circuit-level error parameters. Theoretical predictions match simulation results, showing that the lowest performance degradation is obtained by a new kind of multi-rate hybrid ΣΔ modulator, in which the front-end (continuous-time) stage operates at a higher rate than the back-end (discrete-time) stages. As a case study, the design of a hybrid GmC/switched-capacitor fourth-order (two-stage, 4-bit) cascade ΣΔ modulator is discussed to illustrate the potential benefits of the presented approachapplication/pdfengAtribución-NoComercial-SinDerivadas 3.0 Estados Unidos de Américahttp://creativecommons.org/licenses/by-nc-nd/4.0/Analog-to-digital convertersSigma-delta modulatorsHybrid continuous-time/discrete-timeMulti-rate signal processingSigma-delta modulatorsinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/openAccesshttps://doi.org/10.1016/j.mejo.2013.10.017