Viejo Cortés, JuliánVillar de Ossorno, José IgnacioJuan Chico, JorgeMillán Calderón, AlejandroBellido Díaz, Manuel JesúsOstúa Arangüena, Enrique2017-01-242017-01-242010Viejo Cortés, J., Villar de Ossorno, J.I., Juan Chico, J., Millán Calderón, A., Bellido Díaz, M.J. y Ostúa Arangüena, E. (2010). Design and implementation of a suitable core for on-chip long-term verification. En International Symposium on Industrial Embedded Systems, SIES 2010 (234-237), Trento, Italia: IEEE Computer Society.978-1-4244-5839-4http://hdl.handle.net/11441/52637Traditional on-chip and off-chip logic analyzers present important shortcomings when used for the long-term verification of industrial embedded systems, forcing the designer to implement ad-hoc verification solutions. This contribution presents a suitable solution for long-term verification of FPGAbased designs consisting on a verification core that uses the Picoblaze microcontroller, dedicated logic and a serial port communication in order to monitor the internal signals of the system in a continuous way. The core design focuses on low resource requirements and reusability and has been successfully applied to the verification of a real industrial synchronization platform showing remarkable advantages over commercial onchip solutions like Xilinx’s ChipScope Pro.application/pdfengAttribution-NonCommercial-NoDerivatives 4.0 Internacionalhttp://creativecommons.org/licenses/by-nc-nd/4.0/info:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/openAccesshttps://doi.org/10.1109/SIES.2010.5551400