Xu, ZihanCavaliere, MatteoAn, PeiVrudhula, SarmaCao, Yu2016-01-292016-01-292014978-84-940056-4-0http://hdl.handle.net/11441/33582Spiking neural P systems (in short, SN P systems) have been introduced as computing devices inspired by the structure and functioning of neural cells. The presence of unreliable components in SN P systems can be considered in many di erent aspects. In this paper we focus on two types of unreliability: the stochastic delays of the spiking rules and the stochastic loss of spikes. We propose the implementation of elementary SN P systems with DRAM-based CMOS circuits that are able to cope with these two forms of unreliability in an e cient way. The constructed bio-inspired circuits can be used to encode basic arithmetic modules.application/pdfengAttribution-NonCommercial-NoDerivatives 4.0 Internacionalhttp://creativecommons.org/licenses/by-nc-nd/4.0/The Stochastic Loss of Spikes in Spiking Neural P Systems: Design and Implementation of Reliable Arithmetic Circuitsinfo:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/openAccess