VLSI implementation of a transconductance mode continuous BAM with on chip learning and dynamic analog memory

2020-03-172020-03-171991Linares Barranco, B., Sánchez Sinencio, E., Rodríguez Vázquez, Á.B. y Huertas Díaz, J.L. (1991). VLSI implementation of a transconductance mode continuous BAM with on chip learning and dynamic analog memory. En IEEE International Symposium on Circuits and Systems (1283-1286), Singapur, Singapur: Institute of Electrical and Electronics Engineers.0-7803-0050-50271-4310https://hdl.handle.net/11441/94214In this paper we present a complete VLSI Continuous-Time Bidirectional Associative Memory (BAM). The short term memory (STM) section is implemented using small transconductance four quadrant multipliers, and capacitors for the integrators. The long term memory (LTM) is built using an additional multiplier that uses locally available signals to perform Hebbian learning. The value of the learned weight is present at a capacitor for each synapse. After learning has been accomplished the value of the stored weight voltage can be refreshed using a simple AID-D/A conversion, which if done fast enough, will maintain the weight value within a discrete interval of the complete weight range. Such a discretization still allows good performance of the STM section after learning is finished.application/pdf4 p.engAttribution-NonCommercial-NoDerivatives 4.0 Internacionalhttp://creativecommons.org/licenses/by-nc-nd/4.0/VLSI implementation of a transconductance mode continuous BAM with on chip learning and dynamic analog memoryinfo:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/openAccess10.1109/ISCAS.1991.17660420391959