Rodríguez Vázquez, Ángel BenitoCarmona Galán, RicardoDomínguez Matas, CarlosSuárez Cambre, ManuelBrea Sánchez, Víctor ManuelPozas, FranciscoLiñán Cembrano, GustavoFoldessy, PeterZarandy, AkosRekeczky, Csaba2019-08-122019-08-122010Rodríguez Vázquez, Á.B., Carmona Galán, R., Domínguez Matas, C., Suárez Cambre, M., Brea Sánchez, V.M., Pozas, F.,...,Rekeczky, C. (2010). A 3-D Chip Architecture for Optical Sensing and Concurrent Processing. Proceedings of SPIE, 7726, 772613.1996-756Xhttps://hdl.handle.net/11441/88350Event: SPIE Photonics Europe, 2010, Brussels, BelgiumThis paper presents an architecture for the implementation of vision chips in 3-D integration technologies. This architecture employs the multi-functional pixel concept to achieve full parallel processing of the information and hence high processing speed. The top layer includes an array of optical sensors which are parallel-connected to the second layer, consisting of an array of mixed-signal read-out and pre-processing cells. Multiplexing is employed so that each mixedsignal cell handles several optical sensors. The two remaining layer are respectively a memory (used to store different multi-scale images obtained at the mixed-signal layer) and an array of digital processors. A prototype of this architecture has been implemented in a FDSOI CMOS-3D technology with Through-Silicon-Vias of 5μm x 5μm pitch.application/pdfengAttribution-NonCommercial-NoDerivatives 4.0 Internacionalhttp://creativecommons.org/licenses/by-nc-nd/4.0/3-D Optical SensorsVision SystemsNavigation Applicationsinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/openAccesshttps://doi.org/10.1117/12.855027