2023-01-202023-01-202018Paul, A., Ramírez Angulo, J., López Martín, A.J. y González Carvajal, R. (2018). CMOS First-Order All-Pass Filter With 2-Hz Pole Frequency. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 27 (2), 294-303. https://doi.org/10.1109/TVLSI.2018.2878017.1063-8210https://hdl.handle.net/11441/141624A CMOS fully integrated all-pass filter with an extremely low pole frequency of 2 Hz is introduced in this paper. It has 0.08-dB passband ripple and 0.029-mm 2 Si area. It has 0.38-mW power consumption in strong inversion with ±0.6-V power supplies. In subthreshold, it has 0.64-μW quiescent power and operates with ±200-mV dc supplies. Miller multiplication is used to obtain a large equivalent capacitor without excessive Si area. By varying the gain of the Miller amplifier, the pole frequency can be varied from 2 to 48 Hz. Experimental and simulation results of a test chip prototype in 130-nm CMOS technology validate the proposed circuit.application/pdf10 p.engAttribution-NonCommercial-NoDerivatives 4.0 Internacionalhttp://creativecommons.org/licenses/by-nc-nd/4.0/All-pass filter (APF)AmplifierMiller multiplierOperational transconductance amplifier (OTA)Voltage followerinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/openAccess10.1109/TVLSI.2018.2878017