Fernández Berni, JorgeCarmona Galán, RicardoRodríguez Vázquez, Ángel Benito2018-06-012018-06-012013Fernández Berni, J., Carmona Galán, R. y Rodríguez Vázquez, Á.B. (2013). An ultra-low-power voltage-mode asynchronous WTA-LTA circuit. En IEEE International Symposium on Circuits and Systems (ISCAS) (1-4), Beijing, China: Institute of Electrical and Electronics Engineers.978-1-4673-5762-3 (electrónico)978-1-4673-5760-9 (impreso)https://hdl.handle.net/11441/75548This paper presents an asynchronous mixed-signal WTA-LTA circuit conceived to carry out local minimummaximum indexing in massively parallel image processing arrays. The hardware is focused on energy-efficient operation. We describe a realization for the standard CMOS base process of a commercial 3-D TSV stack featuring a power consumption of only 20pW per elementary cell at 30fps. The proposed block is also capable of resolving small voltage differences without requiring any external reference. This leads to a hit percentage greater than 90% even when taking into account global process variations and mismatch conditions.application/pdfengAtribución-NoComercial-SinDerivadas 3.0 Estados Unidos de Américahttp://creativecommons.org/licenses/by-nc-nd/4.0/info:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/openAccesshttps://doi.org/10.1109/ISCAS.2013.6572218