dc.creator | Ruiz Amaya, Jesús | es |
dc.creator | Fernández Bootello, Juan Francisco | es |
dc.creator | Rosa Utrera, José Manuel de la | es |
dc.creator | Delgado Restituto, Manuel | es |
dc.creator | Río Fernández, Rocío del | es |
dc.date.accessioned | 2018-10-26T10:38:30Z | |
dc.date.available | 2018-10-26T10:38:30Z | |
dc.date.issued | 2005 | |
dc.identifier.citation | Ruiz Amaya, J., Fernández Bootello, J.F., Rosa Utrera, J.M.d.l., Delgado Restituto, M. y Río Fernández, R.d. (2005). A 0.13μm CMOS current steering D/A converter for PLC and VDSL applications. En Conference on Design of Circuits and Integrated Systems, Lisboa (Portugal). | |
dc.identifier.uri | https://hdl.handle.net/11441/79668 | |
dc.description.abstract | This paper describes the design of a 12-bit
80MS/s Digital-to-Analog converter implemented in a
0.13μm CMOS logic technology. The design has been
computer-aided by a developed toolbox for the simulation
and verification of Nyquist-Rate Analog-to-Digital and
Digital-to-Analog converters in MATLAB. The converter
is segmented in an unary current-cell matrix for 8 MSB's
and a binary-weighted array for 4 LSB's. Current
sources of the converter are laid out separately from current-
cell switching matrix core block and distributed in
double centroid to reduce random errors and transient
noise coupling. The linearity errors caused by remaining
gradient errors are reduced by a modified Q2 Random-
Walk switching sequence. Transistor-level simulation
results show that the Spurious-Free Dynamic-Range
is better than 58.5dB up to 80MS/s. The estimated Signal-
to-Noise Distortion Ratio yield is 99.7% and better
than 58dB from DC to Nyquist frequency. Multi-Tone
Power Ratio is higher than 59dB for several DMT test signals.
The converter dissipates less than 129mW from a
3.3V supply and occupies less than 1.7mm2 active area. | es |
dc.description.sponsorship | Ministerio de Ciencia y Tecnología TIC2003-02355RAICONIF | es |
dc.description.sponsorship | Unión Europea, Agencia de Salud y Consumo MEDEA+ (A110 MIDAS) | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.relation.ispartof | Conference on Design of Circuits and Integrated Systems (2005), p 1-6 | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Digital-to-analog converters | es |
dc.subject | Current source | es |
dc.subject | Segmentation | es |
dc.subject | Switching sequence | es |
dc.title | A 0.13μm CMOS current steering D/A converter for PLC and VDSL applications | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.projectID | TIC2003-02355RAICONIF | es |
idus.format.extent | 6 p. | es |
dc.publication.initialPage | 1 | es |
dc.publication.endPage | 6 | es |
dc.eventtitle | Conference on Design of Circuits and Integrated Systems | es |
dc.eventinstitution | Lisboa (Portugal) | es |
dc.contributor.funder | Ministerio de Ciencia y Tecnología (MCYT). España | |
dc.contributor.funder | European Union (UE) | |