dc.creator | Núñez Martínez, Juan | es |
dc.creator | Avedillo de Juan, María José | es |
dc.creator | Quintana Toledo, José María | es |
dc.date.accessioned | 2018-07-03T16:12:28Z | |
dc.date.available | 2018-07-03T16:12:28Z | |
dc.date.issued | 2011 | |
dc.identifier.citation | Nuñez Martínez, J., Avedillo de Juan, M.J. y Quintana Toledo, J.M. (2011). RTD-CMOS pipelined networks for reduced power consumption. IEEE Transactions on Nanotechnology, 10 (6), 1217-1220. | |
dc.identifier.issn | 1536-125X | es |
dc.identifier.issn | 1941-0085 | es |
dc.identifier.uri | https://hdl.handle.net/11441/76623 | |
dc.description.abstract | The incorporation of resonant tunneling diodes (RTDs) into III/V transistor technologies has shown an improved circuit performance, producing higher circuit speed, reduced component count, and/or lower power consumption. Currently, the incorporation of these devices into CMOS technologies (RTD-CMOS) is an area of active research. Although some studies have concentrated on evaluating the advantages of this incorporation, more work in this direction is required. In this letter, we compare RTD-CMOS and pure CMOS realizations of a logic gate network which can be operated in a gate-level pipeline. Significantly lower average power is obtained for RTD-CMOS implementations. | es |
dc.description.sponsorship | Gobierno de España TEC2007-67245, TEC2010-18937 | es |
dc.description.sponsorship | Junta de Andalucía TIC-2961 | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | IEEE Transactions on Nanotechnology, 10 (6), 1217-1220. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Resonant tunneling diode | es |
dc.subject | Nano-pipeline | es |
dc.subject | Emerging technologies | es |
dc.subject | Logic circuits | es |
dc.subject | Power efficiency | es |
dc.title | RTD-CMOS pipelined networks for reduced power consumption | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.projectID | TEC2007-67245 | es |
dc.relation.projectID | TEC2010-18937 | es |
dc.relation.projectID | TIC-2961 | es |
dc.relation.publisherversion | http://dx.doi.org/10.1109/TNANO.2011.2157518 | es |
dc.identifier.doi | 10.1109/TNANO.2011.2157518 | es |
idus.format.extent | 3 p. | es |
dc.journaltitle | IEEE Transactions on Nanotechnology | es |
dc.publication.volumen | 10 | es |
dc.publication.issue | 6 | es |
dc.publication.initialPage | 1217 | es |
dc.publication.endPage | 1220 | es |
dc.contributor.funder | Gobierno de España | |
dc.contributor.funder | Junta de Andalucía | |