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Master's Final Project

dc.contributor.advisorGarcía Franquelo, Leopoldoes
dc.creatorMohan, Charanrajes
dc.date.accessioned2016-04-18T15:37:01Z
dc.date.available2016-04-18T15:37:01Z
dc.date.issued2015-07
dc.identifier.urihttp://hdl.handle.net/11441/40039
dc.description.abstractThe thesis consists of implementing a Generalized Predictive Control (GPC) strategy for controlling the output voltage of the T-type converter with output LC filter, whose control signals are modulated by a fast three-dimensional Space Vector Modulation (SVM). The GPC strategy used for the T-type converter involves developing a system of dynamic equations from the output LC filter and load, which is transformed to a Controlled Auto-Regressive and Moving-Average (CARIMA) model in order to obtain a sequence of control signals, so that a cost function is optimized and the reference is tracked. The core of the thesis addresses the main problem of dc-link capacitor balancing. This is done by modeling the converter and deploying a mathematical analysis of the capacitor voltage difference dynamics, by singular perturbation approach. This analysis results in an explicit sinusoidal disturbance. Now, classical control theory is applied by using a Luenberger Observer (LO) in order to estimate the disturbance and encounter it, thereby keeping the dc-link capacitor voltage balanced in the due flow of the modulation and output voltage control. By this method, the output voltage across the filter capacitor is controlled, the dc-link capacitor voltage is balanced and the lowfrequency voltage ripples present in the dc-link of the T-type converter are reduced to an acceptable level.es
dc.formatapplication/pdfes
dc.language.isoenges
dc.rightsAtribución-NoComercial-SinDerivadas 4.0 España
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectPower converters (multilevel)es
dc.subjectAdvanced control techniques of power converterses
dc.subjectConverters (types)es
dc.titleA Generalized Predictive Controlled T-type power inverter with a deterministic dc-link capacitor voltage balancing approaches
dc.typeinfo:eu-repo/semantics/masterThesises
dc.type.versioninfo:eu-repo/semantics/publishedVersiones
dc.rights.accessrightsinfo:eu-repo/semantics/openAccess
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Ingeniería Electrónicaes
dc.description.degreeMáster en Electrónica, Tratamiento de Señal y Comunicacioneses
dc.identifier.idushttps://idus.us.es/xmlui/handle/11441/40039

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Atribución-NoComercial-SinDerivadas 4.0 España
Except where otherwise noted, this item's license is described as: Atribución-NoComercial-SinDerivadas 4.0 España