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Mostrando ítems 31-40 de 53
Ponencia
HALOTIS: high accuracy LOgic TIming simulator with inertial and degradation delay model
(IEEE Computer Society, 2001)
This communication presents HALOTIS, a novel high accuracy logic timing simulation tool, that incorporates a new simulation algorithm based on different concepts for transitions and events. This new simulation algorithm ...
Ponencia
Modelos de adaptación de los programas formativos al espacio europeo
(Universidad Politécnica de Valencia, 2004)
Ante el volumen de información a veces contradictoria acerca de la educación, en este artículo pretendemos presentar una propuesta de modelo de formación para ayudar en la medida de lo posible a la creación de programas ...
Ponencia
Automatic logic synthesis for parallel alternating latches clocking schemes
(SPIE Digital Library, 2007)
This paper proposes a VHDL coding technique that allows for the automatic synthesis of digital circuits using the so called Parallel Alternating Latches Clocking Schemes (PALACS). The proposed method greatly improves ...
Capítulo de Libro
Logic-Level Fast Current Simulation for Digital CMOS Circuits
(Springer, 2005)
Nowadays, verification of digital integrated circuit has been focused more and more from the timing and area field to current and power estimations. The main problem with this kind of verification is on the lack of ...
Ponencia
Building a basic membrane computer
(Fénix, 2016)
In this work, we present the building of two well-known membrane com- puters (squares generator and divisor test). Although they are very basic machines they present problems common to every P system (competition, parallel ...
Ponencia
Arquitectura para el diseño de circuitos autotemporizados bidimensionales. Realización de multiplicadores
(Universidad de Málaga, 1993)
La realización de sistemas digitales mediante técnicas autotemporizadas constituye la mejor alternativa para resolver la problemática de las técnicas síncronas en circuitos VLSI. En esta comunicación se presenta una mejora ...
Ponencia
Efficient techniques and methodologies for embedded system design usign free hardware and open standards
(IEEE Computer Society, 2009)
Ponencia
New CMOS VLSI Linear Self-Timed Architectures
(1995)
The implementation of digital signal processor circuits via self-timed techniques is currently a valid altemative to solve some problems encountered in synchronous VLSI circuits. However; a main difference between ...
Ponencia
Implementation of a FFT/IFFT Module on FPGA: Comparison of Methodologies
(IEEE Computer Society, 2008)
In this work, we have compared three different methodologies for the implementation of a FFT/IFFT module on FPGA: VHDL coding (VC), System-level tools at RT level (STR), and System-level tools at macroblock level (STM). ...
Ponencia
Seguridad en Internet: web spoofing
(Universidad Politécnica de Valencia, 2004)
En este trabajo se estudia la técnica Web Spoofing como método de ataque a través de Internet. Se trata de una variante del clásico ataque man-in-the-middle en el que un ordenador intermedio analiza y registra información ...