Browsing Artículos (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) by Funding agency "European Union (UE)"
Now showing items 1-20 of 23
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Article
1 V CMOS subthreshold log domain PDM
(Springer, 2003)A new CMOS circuit strategy for very low-voltage Pulse-Duration Modulators (PDM) is proposed. Optimization of voltage ...
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Article
A 32 x 32 Pixel Convolution Processor Chip for Address Event Vision Sensors With 155 ns Event Latency and 20 Meps Throughput
(IEEE Computer Society, 2011)This paper describes a convolution chip for event-driven vision sensing and processing systems. As opposed to conventional ...
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Article
A calibration technique for very low current and compact tunable neuromorphic cells: Application to 5-bit 20nA DACs
(Institute of Electrical and Electronics Engineers, 2008)Low current applications, like neuromorphic circuits, where operating currents can be as low as a few nanoamperes or less, ...
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Article
A CMOS 110-dB@40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-selta modulator for low-power high-linearity automotive aensor ASICs
(Institute of Electrical and Electronics Engineers, 2005)This paper describes a 0.35-μm CMOS chopper-stabilized switched-capacitor 2-1 cascade ΣΔ modulator for automotive sensor ...
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A Customizable Thermographic Imaging System for Medical Image Acquisition and Processing
(Institute of Electrical and Electronics Engineers, 2022)A custom system has been developed for medical image acquisition and processing in both the visible and the infrared (IR) ...
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Article
A highly sensitive microsystem based on nanomechanical biosensors for genomics applications
(Elsevier, 2006)Microcantilever-based biosensors are a promising tool to detect biomolecular interactions in a direct way with high accuracy. ...
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A neuromorphic cortical-layer microchip for spike-based event processing vision systems
(Institute of Electrical and Electronics Engineers, 2006)We present a neuromorphic cortical-layer processing microchip for address event representation (AER) spike-based processing ...
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A spatial contrast retina with on-chip calibration for neuromorphic spike-based AER vision systems
(Institute of Electrical and Electronics Engineers, 2007)We present a 32 32 pixels contrast retina microchip that provides its output as an address event representation (AER) ...
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Analysis of error mechanisms in switched-current Sigma-Delta modulators
(Springer, 2004)This paper presents a systematic analysis of the major switched-current (SI) errors and their influence on the performance ...
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Benchmarking Spike-Based Visual Recognition: A Dataset and Evaluation
(Frontiers Media, 2016)Today, increasing attention is being paid to research into spike-based neural computation both to gain a better understanding ...
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Article
Compact low-power calibration mini-DACs for neural arrays with programmable weights
(Institute of Electrical and Electronics Engineers, 2003)This paper considers the viability of compact low-resolution low-power mini digital-to-analog converters (mini-DACs) for ...
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Article
Fourth-order cascade SC ΣΔ modulators: a comparative study
(Institute of Electrical and Electronics Engineers, 1998)Fourth-order cascade ΣΔ modulators are very well suited for IC implementation using analog sampled-data circuits because ...
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Article
Generalized reconfigurable memristive dynamical system (MDS) for neuromorphic applications
(Frontiers Media, 2015)This study firstly presents (i) a novel general cellular mapping scheme for two dimensional neuromorphic dynamical systems ...
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Article
Hardware Implementation of Differential Oscillatory Neural Networks Using VO 2-Based Oscillators and Memristor-Bridge Circuits
(Frontiers Media, 2021)Oscillatory Neural Networks (ONNs) are currently arousing interest in the research community for their potential to implement ...
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Article
Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs
(Institute of Electrical and Electronics Engineers, 2021)This paper presents an innovative yield-aware synthesis strategy based on a hierarchical bottom-up methodology that uses ...
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High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models
(Institute of Electrical and Electronics Engineers, 2005)This paper presents a high-level synthesis tool for ΣΔ Modulators (ΣΔMs) that combines an accurate SIMULINK-based time-domain ...
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Article
Highly Linear 2,5-V CMOS ΣΔ Modulator for ADSL+
(Institute of Electrical and Electronics Engineers, 2004)We present a 90-dB spurious-free dynamic range sigma–delta modulator (ΣΔM) for asymmetric digital subscriber line applications ...
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Article
Low-voltage CMOS log-companding techniques for audio applications
(Springer, 2004)This paper presents a collection of novel current-mode circuit techniques for the integration of very low-voltage (down ...
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Article
On algorithmic rate-coded AER generation
(Institute of Electrical and Electronics Engineers, 2006)This paper addresses the problem of converting a conventional video stream based on sequences of frames into the spike ...
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Article
On the design and characterization of femtoampere current-mode circuits
(Institute of Electrical and Electronics Engineers, 2003)In this paper, we show and validate a reliable circuit design technique based on source voltage shifting for current-mode ...