Listar Artículos (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por agencia financiadora 

Listar Artículos (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por agencia financiadora "Comisión Interministerial de Ciencia y Tecnología (CICYT). España"

Mostrando ítems 1-11 de 11

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      1 V CMOS subthreshold log domain PDM 

      Serra Graells, Francesc; Huertas Díaz, José Luis (Springer, 2003)
      A new CMOS circuit strategy for very low-voltage Pulse-Duration Modulators (PDM) is proposed. Optimization of voltage ...
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      A CMOS 0.8- µm transistor-only 1.63-MHz switched-current bandpass ΣΔ modulator for AM signal A/D conversion 

      Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2000)
      This paper presents a CMOS 0.8-/spl mu/m switched-current (SI) fourth-order bandpass /spl Sigma//spl Delta/ modulator ...
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      A modular programmable CMOS analog fuzzy controller chip 

      Rodríguez Vázquez, Ángel Benito; Navas González, Rafael; Delgado Restituto, Manuel ; Vidal Verdú, Fernando (Institute of Electrical and Electronics Engineers, 1999)
      We present a highly modular fuzzy inference analog CMOS chip architecture with on-chip digital progranirnability. This ...
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      Analysis of error mechanisms in switched-current Sigma-Delta modulators 

      Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito (Springer, 2004)
      This paper presents a systematic analysis of the major switched-current (SI) errors and their influence on the performance ...
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      Efficient realization of a threshold voter for self-purging redundancy 

      Quintana Toledo, José María; Avedillo de Juan, María José; Huertas Díaz, José Luis (Springer, 2001)
      The self-purging technique is not commonly used mainly due to the lack of practical implementations of its key component, ...
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      Low-voltage CMOS log-companding techniques for audio applications 

      Serra Graells, Francesc; Rueda Rueda, Adoración; Huertas Díaz, José Luis (Springer, 2004)
      This paper presents a collection of novel current-mode circuit techniques for the integration of very low-voltage (down ...
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      Multi-bit cascade ΣΔ modulator for high-speed A/D conversion with reduced sensitivity to DAC errors 

      Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1998)
      This paper presents a ΣΔ modulator (ΣΔM) which combines single-bit and multi-bit quantization in a cascade architecture ...
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      Multiplexing architecture for mixed-signal CMOS fuzzy controllers 

      Vidal Verdú, Fernando; Navas González, Rafael; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1998)
      Limited precision imposes limits on the complexity of analogue circuits, and hence fuzzy analogue controllers are usually ...
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      nu MOS-based sorter for arithmetic applications 

      Rodríguez Villegas, Esther; Avedillo de Juan, María José; Quintana Toledo, José María; Huertas Sánchez, Gloria; Rueda Rueda, Adoración (Hindawi Publishing Corporation, 2000)
      The capabilities of the conceptual link between threshold gates and sorting networks are explored by implementing some ...
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      SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips 

      Carmona Galán, Ricardo; García Vargas, Ignacio; Liñán Cembrano, Gustavo; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito (Wiley-Blackwell, 1999)
      This paper presents SIRENA, a CAD environment for the simulation and modelling of mixed-signal VLSI parallel processing ...
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      Sorting networks implemented as νMOS circuits 

      Rodríguez Villegas, Esther; Quintana Toledo, José María; Avedillo de Juan, María José; Rueda Rueda, Adoración (Institute of Electrical and Electronics Engineers, 1998)
      A new realisation for n-input sorters is presented. Resorting to the neuron-MOS (νMOS) concept and to an adequate electrical scheme, a compact and efficient implementation is obtained.