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Mostrando ítems 11-17 de 17
Artículo
nu MOS-based sorter for arithmetic applications
(Hindawi Publishing Corporation, 2000)
The capabilities of the conceptual link between threshold gates and sorting networks are explored by implementing some arithmetic demonstrators. In particular, both an (8×8)-multiplier and a (15,4) counter which use a ...
Artículo
SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips
(Wiley-Blackwell, 1999)
This paper presents SIRENA, a CAD environment for the simulation and modelling of mixed-signal VLSI parallel processing chips based on cellular neural networks. SIRENA includes capabilities for: (a) the description of ...
Ponencia
A 14-bit 4-MS/s Multi-bit Cascade Sigma-Delta Modulator in CMOS 0.35-um Digital Technology
(2000)
This paper presents a 4th-order 3-stage cascade SD modulator that achieves 14-bit dynamic range at 4MS/s using low oversampling ratio. It includes a programmable multi-bit quantizer in the last stage, providing 2-, 3-, ...
Ponencia
Herramientas de CAD para la síntesis de sistemas de interferencia difusos mediante FPGAs
(2002)
En esta comunicación se describe un flujo de diseño que permite automatizar el proceso de síntesis sobre FPGAs de sistemas de inferencia basados en lógica difusa. El entorno de CAD utilizado combina herramientas específicas ...
Ponencia
Reliable analysis of settling errors in SC integrators - application to high-speed low-power ΣΔ modulators design
(1999)
This paper presents a detailed study on the transient response of SC integrators taking into account the effects of amplifier finite gain-bandwidth product and slew-rate during, unlike previous models, both the integration ...
Artículo
Multi-bit cascade ΣΔ modulator for high-speed A/D conversion with reduced sensitivity to DAC errors
(Institute of Electrical and Electronics Engineers, 1998)
This paper presents a ΣΔ modulator (ΣΔM) which combines single-bit and multi-bit quantization in a cascade architecture to obtain high resolution with low oversampling ratio. It is less sensitive to the non-linearity of ...
Artículo
Low-voltage CMOS log-companding techniques for audio applications
(Springer, 2004)
This paper presents a collection of novel current-mode circuit techniques for the integration of very low-voltage (down to 1 V) low-power (few hundreds of μA) complete SoCs in CMOS technologies. The new design proposal is ...