Buscar
Mostrando ítems 21-30 de 62
Ponencia
CMOS Architectures and circuits for high-speed decision-making from image flows
(The International Society for Optical Engineering (SPIE), 2008)
We present architectures, CMOS circuits and CMOS chips to process image flows at very high speed. This is achieved by exploiting bio-inspiration and performing processing tasks in parallel manner and concurrently with image ...
Ponencia
A versatile sensor interface for programmable vision systems-on-chip
(The International Society for Optical Engineering - SPIE, 2003)
This paper describes an optical sensor interface designed for a programmable mixed-signal vision chip. This chip has been designed and manufactured in a standard 0.35μm n-well CMOS technology with one poly layer and five ...
Tesis Doctoral
Diseño CMOS de un sistema de visión “on-chip” para aplicaciones de muy alta velocidad
(2016-02-08)
Esta Tesis presenta arquitecturas, circuitos y chips para el diseño de sensores de visión CMOS con procesamiento paralelo embebido. La Tesis reporta dos chips, en concreto: El chip Q-Eye; El chip Eye-RIS_VSoC.. Y dos ...
Ponencia
Accurate design of analog CNN in CMOS digital technologies
(Institute of Electrical and Electronics Engineers, 1990)
Explores the design of cellular neural networks (CNN) by using sampled-data analog current-mode techniques which neither requires capacitors nor resistors but just MOS transistors. The feature makes the proposed technique ...
Ponencia
SIRENA: A simulation environment for CNNs
(Institute of Electrical and Electronics Engineers, 1994)
SIRENA is a general simulation environment for artificial neural networks, with emphasis towards CNNs. A special interest has been placed in allowing the simulation and modelling of the non-ideal effects expected from VLSI ...
Tesis Doctoral
Ponencia
Experimental demonstration of real-time image-processing using a VLSI analog programmable array processor
(SPIE- The International Society for Optical Engineering, 2000)
This paper describes a full-custom mixed-signal chip which embeds distributed optical signal acquisition, digitallyprogrammable analog parallel processing, and distributed image memory —cache— on a common silicon substrate. ...
Ponencia
CNN universal chip in CMOS technology
(Institute of Electrical and Electronics Engineers, 1994)
This paper describes the design of a CNN universal chip in a standard CMOS technology. The core of the chip consists of an array of 32×32 completely programmable CNN cells. Input image can be loaded in optical or electrical ...
Ponencia
High-speed global shutter CMOS machine vision sensor with high dynamic range image acquisition and embedded intelligence
(The International Society for Optics and Photonics, 2012)
High-speed imagers are required for industrial applications, traffic monitoring, robotics and unmanned vehicles, moviemaking, etc. Many of these applications call also for large spatial resolution, high sensitivity and the ...
Artículo
CMOS optical-sensor array with high output current levels and automatic signal-range centring
(Institution of Engineering and Technology, 1994)
A CMOS compatible photosensor with high output current levels, and an area-efficient scheme for automatic signal-range centring according to illumination conditions are presented. The high output current levels allow the ...