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Mostrando ítems 1-10 de 16
Artículo
A 3-D Chip Architecture for Optical Sensing and Concurrent Processing
(SPIE, 2010)
This paper presents an architecture for the implementation of vision chips in 3-D integration technologies. This architecture employs the multi-functional pixel concept to achieve full parallel processing of the information ...
Ponencia
A 176x144 148dB adaptive tone-mapping imager
(Society of Photo-Optical Instrumentation Engineers, 2012)
This paper presents a 176x144 (QCIF) HDR image sensor where visual information is simultaneously captured and adaptively compressed by means of an in-pixel tone mapping scheme. The tone mapping curve (TMC) is calculated ...
Ponencia
Wi-FLIP: A wireless smart camera based on a focal-plane low-power image processor
(Institute of Electrical and Electronics Engineers, 2011)
This paper presents Wi-FLIP, a vision-enabled WSN node resulting from the integration of FLIP-Q, a prototype vision chip, and Imotel, a commercial WSN platform. In Wi-FLIP, image processing is not only constrained to the ...
Capítulo de Libro
VISCUBE: A multi-layer vision chip
(Springer Science+Business Media, 2011)
Vertically integrated focal-plane sensor-processor chip design, combining image sensor with mixed-signal and digital processor arrays on a four layer structure is introduced. The mixed-signal processor array is designed ...
Ponencia
High-dynamic range tone-mapping algorithm for focal plane processors
(The International Society for Optics and Photonics, 2011)
This paper presents a Dynamic Range improvement technique which is specially well-suited to be implemented in Focal Plane Processors (FPP) due to its very limited computing requirements since only local memories, little ...
Ponencia
A 148dB focal-plane tone-mapping QCIF imager
(Institute of Electrical and Electronics Engineers, 2012)
This paper presents a QCIF HDR imager where visual information is simultaneously captured and adaptively compressed by an in-pixel tone-mapping scheme [1]. The tone mapping curve (TMC) is calculated from the histogram of ...
Ponencia
Live demonstration: Real-time high dynamic range video acquisition using in-pixel adaptive content-aware tone mapping compression
(Institute of Electrical and Electronics Engineers, 2015)
This demonstration targets the acquisition of realtime video sequences involving High Dynamic Range (HDR) scenes. Adaptation to different illumination conditions while preserving contrast is achieved by using a sensor chip, ...
Ponencia
Control and acquisition system for a high dynamic range CMOS image sensor
(Institute of Electrical and Electronics Engineers, 2012)
A control and acquisition system for the visualization of the images captured with a High Dynamic Range (HDR) CMOS Image Sensor is developed. The image sensor is inserted in a PCB system, which performs low level control, ...
Ponencia
Demo: Real-time remote reporting of active regions with Wi-FLIP
(Institute of Electrical and Electronics Engineers, 2011)
This paper describes a real-time application programmed into Wi-FLIP, a wireless smart camera resulting from the integration of FLIP-Q, a focal-plane low-power image processor, and Imote2, a commercial WSN platform. The ...
Capítulo de Libro
A focal plane processor for continuous-time 1-D optical correlation applications
(Springer, 2011)
This chapter describes a 1-D Focal Plane Processor, which has been designed to run continuous-time optical correlation applications. The chip contains 200 sensory processing elements, which acquire light patterns through ...