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Diseño de chips programables de señal mixta con bajo consumo de potencia para sistemas de visión en tiempo real [PhD Thesis]
(2002)
Las Tecnologías de la información y de las Comunicaciones han progresado de forma vertiginosa durante los últimos años. Los laptop actuales tienen prestaciones similares o superiores a las de las estaciones de trabajo de ...
A hierarchical approach for the symbolic analysis of large analog integrated circuits [Presentation]
(IEEE computer society digital library, 2000)
This paper introduces a new hierarchical analysis methodology which incorporates approximation strategies during the analysis process. Consequently, the circuit sizes that can be analyzed increase dramatically, ...
Análisis y diseño de hardware VLSI basado en CNNs para el procesamiento de imágenes en tiempo-real [PhD Thesis]
(2002-06-10)
Durante las últimas décadas del siglo XX hemos asistido a dos oleadas revolucionarias sucesivas en el ámbito del tratamiento automático de la información y las comunicaciones. Estas se han materializado en el ordenador ...
A behavioral modeling concept and practice of CNN-UM VLSI implementations [Presentation]
(Institute of Electrical and Electronics Engineers, 2001)
In this paper we introduce a novel simulation time bounded behavioral modeling technique that optimally selects the incorporated block models. The method has been specially developed for fast performance evaluation of large ...
Comparison of the DR of continuous time Gm-C filters using different structures [Presentation]
(World Scientific and Engineering Academy and Society, 2006)
This paper presents design techniques to evaluate the noise and distortion of continuous time Gm-C filters. Also presents techniques to improve the dynamic range of such filters keeping a relation of integer numbers between ...
A complete retargeting methodology for mixed-signal IC designs [Presentation]
(Institute of Electrical and Electronics Engineers, 2001)
In this paper, an efficient methodology to retargeting and reuse of embedded mixed-signal blocks is presented. Parametrized layout templates, accurate behavioral modeling of mixed-signal blocks, and appropriate mechanisms ...
A 1000 FPS at 128×128 vision processor with 8-bit digitized I/O [Article]
(Institute of Electrical and Electronics Engineers, 2004)
This paper presents a mixed-signal programmable chip for high-speed vision applications. It consists of an array of processing elements, arranged to operate in accordance with the principles of single instruction multiple ...
Reaction-diffusion navigation robot control: from chemical to VLSI analogic processors [Article]
(Institute of Electrical and Electronics Engineers, 2004)
We introduce a new methodology and experimental implementations for real-time wave-based robot navigation in a complex, dynamically changing environment. The main idea behind the approach is to consider the robot arena as ...
Analysis of error mechanisms in switched-current Sigma-Delta modulators [Article]
(Springer, 2004)
This paper presents a systematic analysis of the major switched-current (SI) errors and their influence on the performance degradation of ΣΔ Modulators (ΣΔMs). The study is presented in a hierarchical systematic way. First, ...