Browsing by Author "Valencia Barrero, Manuel"
Now showing items 1-20 of 77
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Presentation
A message transmission system with lightweight encryption as a project in a Master subject
(IEEE Computer Society, 2014)Master subjects should ideally be very practical, to allow students to apply the knowledge they have acquired to the solving ...
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Article
An Academic Approach to FPGA Design Based on a Distance Meter Circuit
(IEEE Computer Society, 2020)Digital design learning at Register Transfer (RT) level requires practical and complex examples as learning progresses. ...
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Article
Analysis of Metastable Operation in a CMOS Dynamic D-Latch
(Springer, 1997)Nowadays, metastability is becoming a serious problem in high-performance VLSI design, mainly due to the relatively-high ...
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Presentation
Aplicaciones docentes del diseño de un pico-procesador
(Universidad de Sevilla, 2016)El conocimiento de la estructura interna y del mecanismo de funcionamiento de microprocesadores es una parte muy importante ...
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Presentation
Aplicación del VHDL en prácticas de diseño de sistemas digitales
(Universidad Politécnica de Madrid, 1994) -
Presentation
Arquitectura para el diseño de circuitos autotemporizados bidimensionales. Realización de multiplicadores
(Universidad de Málaga, 1993)La realización de sistemas digitales mediante técnicas autotemporizadas constituye la mejor alternativa para resolver la ...
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Article
ASIC Design and Power Characterization of Standard and Low Power Multi-Radix Trivium
(IEEE Computer Society, 2020)We are presenting the experimental measurements of the power consumption and the maximum frequency in an ASIC prototype ...
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Presentation
Asymmetric clock driver for improved power and noise performances
(IEEE Computer Society, 2007)One of the most important sources of switching noise and power consumption in large VLSI circuits is the clock generation ...
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Article
Asynchronous Modular Arbiter
(IEEE Computer Society, 1986)A practical N-user arbiter and its implementation are presented in this correspondence. Because of the asynchronous character ...
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Presentation
AUTODDM: AUTOmatic characterization tool for the Delay Degradation Model
(IEEE Computer Society, 2001)As delay models used in logic timing simulation become more and more complex, the problem of model parameter values ...
- PhD Thesis
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Article
Breaking Trivium Stream Cipher Implemented in ASIC Using Experimental Attacks and DFA
(MDPI, 2020-12)One of the best methods to improve the security of cryptographic systems used to exchange sensitive information is to ...
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Presentation
CADPC: Un entorno de diseño de circuitos digitales en ordenadores personales
(Universidad Politécnica de Madrid, 1994) - PhD Thesis
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Presentation
Creación de carteles autoexplicativos para laboratorios de electrónica
(Universidad de Sevilla, 2016)Se presenta un proyecto cuyo objetivo ha sido ha sido la creación de carteles que, a modo de tutoriales resumidos, muestran ...
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Presentation
Creating helping posters for electronic labs
(IEEE Computer Society, 2016)A Project is presented whose aim was to develop a set of posters that, as small tutorials, shows in a very visual way ...
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PhD Thesis
Degradación del retraso de propagación en puertas lógicas CMOS VLSI
(2000-10-20)La evolución en la tecnología de circuitos VLSI da lugar, entre otras cosas, a un aumento en la escala de integración ...
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Chapter of Book
Degradation Delay Model Extension to CMOS Gates
(Springer, 2000)This contribution extends the Degradation Delay Model (DDM), previously developed for CMOS inverters, to simple logic ...
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Presentation
Delay degradation effect in submicronic CMOS inverters
(Université Catholique de Louvain, 1997)This communication presents the evidence of a degradation effect causing important reductions in the delay of a CMOS ...
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Presentation
Desarrollo de un juego sobre FPGA mediante trabajo en equipo
(Asociación Tecnología, Aprendizaje y Enseñanza de la Electrónica (TAEE), 2020)El aprendizaje de diseño digital a nivel RT por los alumnos mejora con trabajos prácticos, desarrollables en equipo, que ...