Browsing by Author "Serrano Gotarredona, María Teresa"
Now showing items 1-20 of 131
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Article
7-decade tuning range CMOS OTA-C sinusoidal VCO
(Institute of Electrical and Electronics Engineers, 1998)A new operational transconductance amplifier-capacitor (OTA-C) based sinusoidal voltage-controlled oscillator (VCO) has ...
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Article
A 1.5 ns OFF/ON Switching-Time Voltage-Mode LVDS Driver/Receiver Pair for Asynchronous AER Bit-Serial Chip Grid Links With Up to 40 Times Event-Rate Dependent Power Savings
(IEEE Computer Society, 2013)This paper presents a low power fast ON/OFF switchable voltage mode implementation of a driver/receiver pair intended ...
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Article
A 3.6 μ s latency asynchronous frame-free event-driven dynamic-vision-sensor
(Institute of Electrical and Electronics Engineers, 2011)This paper presents a 128 × 128 dynamic vision sensor. Each pixel detects temporal changes in the local illumination. A ...
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Article
A 32 x 32 Pixel Convolution Processor Chip for Address Event Vision Sensors With 155 ns Event Latency and 20 Meps Throughput
(IEEE Computer Society, 2011)This paper describes a convolution chip for event-driven vision sensing and processing systems. As opposed to conventional ...
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Presentation
A bioinspired 128x128 pixel dynamic-vision-sensor
(2011)This paper presents a 128x128 dynamic vision sensor. Each pixel detects temporal changes in the local illumination. A ...
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Article
A calibration technique for very low current and compact tunable neuromorphic cells: Application to 5-bit 20nA DACs
(Institute of Electrical and Electronics Engineers, 2008)Low current applications, like neuromorphic circuits, where operating currents can be as low as a few nanoamperes or less, ...
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Article
A CMOL-Like Memristor-CMOS Neuromorphic Chip-Core Demonstrating Stochastic Binary STDP
(Institute of Electrical and Electronics Engineers Inc., 2022-12)The advent of nanoscale memristors raised hopes of being able to build CMOL (CMOS/nanowire/molecular) type ultra-dense ...
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Article
A Configurable Event-Driven Convolutional Node with Rate Saturation Mechanism for Modular ConvNet Systems Implementation
(Frontiers Media, 2018)Convolutional Neural Networks (ConvNets) are a particular type of neural network often used for many applications like ...
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Presentation
A Current Attenuator for Efficient Memristive Crossbars Read-Out
(IEEE Computer Society, 2019)This paper presents a new current attenuator circuit to scale down the inference currents in memristor based crossbars that ...
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Article
A Digital Neuromorphic Realization of the 2-D Wilson Neuron Model
(IEEE Computer Society, 2019)This brief presents a piecewise linear approximation of the nonlinear Wilson (NW) neuron model for the realization of ...
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Article
A five-decade dynamic-range ambient-light-independent calibrated signed-spatial-contrast AER retina with 0.1-ms latency and optional time-to-first-spike mode
(Institute of Electrical and Electronics Engineers, 2010)Address Event Representation (AER) is an emergent technology for assembling modular multiblock bio-inspired sensory and ...
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Presentation
A General Subthreshold MOS Translinear Theorem
(IEEE Computer Society, 1999)This paper outlines the conditions under which the translinear principle can be fully exploited for MOS transistors operating ...
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Article
A general translinear principle for subthreshold MOS transistors
(Institute of Electrical and Electronics Engineers, 1999)This paper revises the conditions under which the translinear principle can be fully exploited for MOS transistors operating ...
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Article
A high-precision current-mode WTA-MAX circuit with multichip capability
(Institute of Electrical and Electronics Engineers, 1998)This paper presents a circuit design technique suitable for the realization of winner-take-all (WTA), maximum (MAX), ...
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Article
A Low-Power Current Mode Fuzzy-ART Cell
(IEEE Computer Society, 2006)This paper presents a very large scale integration (VLSI) implementation of a low-power current-mode fuzzy-adaptive ...
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Article
A memristive nanoparticle/organic hybrid synapstor for neuro-inspired computing.
(Wiley, 2011)A large effort is devoted to the research of new computing paradigms associated with innovative nanotechnologies that ...
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Presentation
A Methodology for MOS Transistor Mismatch Parameter Extraction and Mismatch Simulation
(IEEE Computer Society, 2000)This paper presents a methodology for mismatch parameter extraction and mismatch simulation using conventional electrical ...
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Presentation
A Mismatch Calibrated Bipolar Spatial Contrast AER Retina with Adjustable Contrast Threshold
(IEEE Computer Society, 2009)Address Event Representation (AER) is an emergent technology for assembling modular multi-blocks bio-inspired sensory ...
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Article
A modified ART 1 algorithm more suitable for VLSI implementations
(Elsevier, 1996)This paper presents a modification to the original ART 1 algorithm (Carpenter and Grossberg, 1987a, A massively parallel ...
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Article
A modular current-mode high-precision winner-take-all circuit
(IEEE Computer Society, 1995)In this paper we present a Winner-Take-All (WTA) circuit realized using current-mode circuit design techniques. The ...