- idUS
- Browsing by Author
Por motivos de mantenimiento se ha deshabilitado el inicio de sesión temporalmente. Rogamos disculpen las molestias.
Browsing by Author "Rodríguez Vázquez, Ángel Benito"
Now showing items 1-20 of 434
-
Presentation
1/f/sup y/ noise generation through a chaotic nonlinear switched-capacitor circuit
Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992)A programmable switched-capacitor circuit for the generation of 1/f/sup y/ noise is reported. The circuit is described by ...
-
Article
10mhz cmos ota-c voltage-controlled quadrature oscillator
Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito; Sánchez Sinencio, Edgar; Huertas Díaz, José Luis (Institution of Engineering and Technology, 1989)A quadrature-type voltage-controlled oscillator with operational transconductance amplifiers and capacitors (OTA-C) is ...
-
Presentation
1D Cellular Automata for Pulse Width Modulated Compressive Sampling CMOS Image Sensors
Trevisi, Marco; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2018)Compressive sensing (CS) is an alternative to the Shannon limit when the signal to be acquired is known to be sparse or ...
-
Presentation
3-Layer CNN Chip for Focal-Plane Complex Dynamics with Adaptive Image Capture
Domínguez Matas, Carlos; Carmona Galán, Ricardo; Sánchez Fernández, Francisco J.; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006)This paper presents a CMOS implementation of a layered CNN concurrent with 32times32 photosensors with locally programmable ...
-
Presentation
3D multi-layer vision architecture for surveillance and reconnaissance applications
Földesy, Péter; Carmona Galán, Ricardo; Zarandy, A.; Rekeczky, Csaba; Rodríguez Vázquez, Ángel Benito; Roska, Tamás (Institute of Electrical and Electronics Engineers, 2009)The architecture and the design details of a multilayer combined mixed-signal and digital sensor-processor array chip is ...
-
Presentation
5×5 SPAD matrices for the study of the trade-offs between fill factor, dark count rate and crosstalk in the design of CMOS image sensors
Moreno García, Manuel; Río Fernández, Rocío del; Guerra Vinuesa, Oscar; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2014)CMOS Single Photon Avalanche Diodes (SPADs) are a dedicated type of photodetectors that are attracting increasing interest. ...
-
Presentation
A 0.18 μm CMOS low noise, highly linear continuous-time seventh-order elliptic low-pass filter
Fernández Bootello, Juan Francisco; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering- SPIE, 2005)This paper presents a fast procedure for the system-level evaluation of noise and distortion in continuous-time integrated ...
-
Presentation
A 0.18μm CMOS low-noise elliptic low-pass continuous-time filter
Fernández Bootello, Juan Francisco; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2005)This paper presents a seventh order low-pass continuous-time elliptic filter for use in a high-performance wireline ...
-
Presentation
A 0.35 μm CMOS 17-bit@40-kS/s cascade 2-1 ΣΔ modulator with programmable gain and programmable chopper stabilization
Guerra Vinuesa, Oscar; Escalera Morón, Sara; Rosa Utrera, José Manuel de la; Río Fernández, Rocío del; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2005)This paper describes a 0.35μm CMOS chopper-stabilized Switched-Capacitor 2-1 cascade ΣDelta; modulator for automotive ...
-
Presentation
A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator
García González, José Manuel; Escalera Morón, Sara; Rosa Utrera, José Manuel de la; Guerra Vinuesa, Oscar; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004)This paper describes the design and electrical implementation of an A/D interface for sensor applications realized in a ...
-
Presentation
A 0.5 /spl mu/m CMOS CNN analog random access memory chip for massive image processing
Carmona Galán, Ricardo; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Roska, Tamás; Kozek, Tibor; Chua, Leon O. (Institute of Electrical and Electronics Engineers, 1998)An analog RAM has been designed to act as a cache memory for a CNN Universal Machine. Hence, all the non-standard chips ...
-
Article
A 0.8-μm CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage
Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Földesy, Péter; Zarándy, Ákos; Szolgay, Péter; Szirányi, Tamás; Roska, Tamás (Institute of Electrical and Electronics Engineers, 1997)This paper presents a CMOS chip for the parallel acquisition and concurrent analog processing of two-dimensional (2-D) ...
-
Article
A 1000 FPS at 128×128 vision processor with 8-bit digitized I/O
Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Jiménez Garrido, Francisco José; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael (Institute of Electrical and Electronics Engineers, 2004)This paper presents a mixed-signal programmable chip for high-speed vision applications. It consists of an array of ...
-
Presentation
A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator
Tortosa Navas, Ramón; Aceituno, Antonio; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (Institute of Electrical and Electronics Engineers, 2007)This paper reports the transistor-level design of a 130-nm CMOS continuous-time cascade ΣΔ modulator. The modulator topology, ...
-
Article
A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ modulator in CMOS 0.7-μm single-poly technology
Medeiro Hidalgo, Fernando; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1999)This paper presents a CMOS 0.7-μm ΣΔ modulator IC that achieves 13-bit dynamic range at 2.2 MS/s with an oversampling ratio ...
-
Presentation
A 14-bit 4-MS/s Multi-bit Cascade Sigma-Delta Modulator in CMOS 0.35-um Digital Technology
Río Fernández, Rocío del; Medeiro Hidalgo, Fernando; Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito (2000)This paper presents a 4th-order 3-stage cascade SD modulator that achieves 14-bit dynamic range at 4MS/s using low ...
-
Presentation
A 148dB focal-plane tone-mapping QCIF imager
Vargas Sierra, Sonia; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012)This paper presents a QCIF HDR imager where visual information is simultaneously captured and adaptively compressed by an ...
-
Article
A 151 dB high dynamic range CMOS image sensor chip architecture with tone mapping compression embedded in-pixel
Vargas Sierra, Sonia; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2015)This paper presents a high dynamic range CMOS image sensor that implements an in-pixel content-aware adaptive global tone ...
-
Presentation
A 16 Rules@2.5Mflips Mixed-Signal Programmable Fuzzy Controller CMOS-1μm Chip
Vidal Verdú, Fernando; Navas González, Rafael; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1996)We present a fuzzy inference chip capable to evaluate 16 programmable rules at a speed of 2.5Mflips (2.5 × 10 6 fuzzy ...
-
Presentation
A 176x144 148dB adaptive tone-mapping imager
Vargas Sierra, Sonia; Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito (Society of Photo-Optical Instrumentation Engineers, 2012)This paper presents a 176x144 (QCIF) HDR image sensor where visual information is simultaneously captured and adaptively ...