Now showing items 1-20 of 38

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      A Binaural Neuromorphic Auditory Sensor for FPGA: A Spike Signal Processing Approach  [Article]

      Jiménez Fernández, Ángel Francisco; Cerezuela Escudero, Elena; Miró Amarante, María Lourdes; Domínguez Morales, Manuel Jesús; Gómez Rodríguez, Francisco de Asís; Linares Barranco, Alejandro; Jiménez Moreno, Gabriel (IEEE Computer Society, 2017)
      This paper presents a new architecture, design flow, and field-programmable gate array (FPGA) implementation analysis of a neuromorphic binaural auditory sensor, designed completely in the spike domain. Unlike digital ...
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      A LVDS Serial AER Link  [Presentation]

      Miró Amarante, María Lourdes; Jiménez Fernández, Ángel Francisco; Linares Barranco, Alejandro; Gómez Rodríguez, Francisco de Asís; Paz Vicente, Rafael; Jiménez Moreno, Gabriel; Civit Balcells, Antón (IEEE Computer Society, 2007)
      Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). Such systems ...
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      A spiking neural network for real-time Spanish vowel phonemes recognition  [Article]

      Miró Amarante, María Lourdes; Gómez Rodríguez, Francisco de Asís; Jiménez Fernández, Ángel Francisco; Jiménez Moreno, Gabriel (Elsevier, 2017)
      This paper explores neuromorphic approach capabilities applied to real-time speech processing. A spiking recognition neural network composed of three types of neurons is proposed. These neurons are based on an integrative ...
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      A SpiNNaker Application: Design, Implementation and Validation of SCPGs  [Presentation]

      Cuevas Arteaga, Brayan; Domínguez Morales, Juan Pedro; Rostro González, Horacio; Espinal, Andrés; Jiménez Fernández, Ángel Francisco; Gómez Rodríguez, Francisco de Asís; Linares Barranco, Alejandro (Springer, 2017)
      In this paper, we present the numerical results of the implementation of a Spiking Central Pattern Generator (SCPG) on a SpiNNaker board. The SCPG is a network of current-based leaky integrateand- fire (LIF) neurons, ...
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      A USB3.0 FPGA Event-based Filtering and Tracking Framework for Dynamic Vision Sensors  [Presentation]

      Linares Barranco, Alejandro; Gómez Rodríguez, Francisco de Asís; Villanueva, V.; Longinotti, L.; Delbrück, T. (IEEE Computer Society, 2015)
      Dynamic vision sensors (DVS) are frame-free sensors with an asynchronous variable-rate output that is ideal for hard real-time dynamic vision applications under power and latency constraints. Post-processing of the ...
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      AER Auditory Filtering and CPG for Robot Control  [Presentation]

      Gómez Rodríguez, Francisco de Asís; Linares Barranco, Alejandro; Miró Amarante, María Lourdes; Liu, Shih-Chii; Schaik, André van; Etienne-Cummings, R.; Lewis, M. A. (IEEE Computer Society, 2007)
      Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). The ...
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      AER Building Blocks for Multi-Layer Multi-Chip Neuromorphic Vision Systems  [Presentation]

      Serrano Gotarredona, Rafael; Oster, M.; Lichtsteiner, P.; Linares Barranco, Alejandro; Paz Vicente, Rafael; Gómez Rodríguez, Francisco de Asís; Kolle Riis, H.; Delbrück, Tobi; Liu, Shih-Chii; Zahnd, S.; Whatley, A.M.; Douglas, R.; Häfliger, P.; Jiménez Moreno, Gabriel; Civit Balcells, Antón; Serrano Gotarredona, María Teresa; Acosta Jiménez, Antonio José; Linares Barranco, Bernabé (Neural Information Processing Systems Foundation, 2005)
      A 5-layer neuromorphic vision processor whose components communicate spike events asychronously using the address-eventrepresentation (AER) is demonstrated. The system includes a retina chip, two convolution chips, a ...
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      AER tools for Communications and Debugging  [Presentation]

      Gómez Rodríguez, Francisco de Asís; Paz Vicente, Rafael; Linares Barranco, Alejandro; Rivas Pérez, Manuel; Miró Amarante, María Lourdes; Vicente Díaz, Saturnino; Jiménez Moreno, Gabriel; Civit Balcells, Antón (IEEE Computer Society, 2006)
      Address-event-representation (AER) is a communications protocol for transferring spikes between bio-inspired chips. Such systems may consist of a hierarchical structure with several chips that transmit spikes among them ...
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      An AER Spike-Processing Filter Simulator and Automatic VHDL Generator Based on Cellular Automata  [Presentation]

      Rivas Pérez, Manuel; Linares Barranco, Alejandro; Gómez Rodríguez, Francisco de Asís; Morgado Estévez, Arturo; Civit Balcells, Antón; Jiménez Moreno, Gabriel (Springer, 2011)
      Spike-based systems are neuro-inspired circuits implementations traditionally used for sensory systems or sensor signal processing. Address-Event- Representation (AER) is a neuromorphic communication protocol for ...
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      Análisis, diseño e implementación de sistemas neuromórficos basados en pulsos para el procesado de información de retinas artificiales  [PhD Thesis]

      Gómez Rodríguez, Francisco de Asís (2011)
      Esta tesis se articula en 8 capítulos: Capítulo 1: el presente, dedicado a introducir las motivaciones, los objetivos y la estructura. ... 9;serif'">Capítulo 2: dedicado a repasar algunos de los fundamentos de los sistemas ...
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      Una aportación al procesado neuromórfico de audio basado en modelos pulsantes. Desde la cóclea a la percepción auditiva  [PhD Thesis]

      Miró Amarante, María Lourdes (2013-07-12)
      El objetivo principal de esta tesis es abordar un nuevo sistema de procesado neuromórfico de audio basado en la representación pulsante de la información. Para ello se pretende desarrollar un nuevo sensor neuromórfico de ...
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      Approaching Retinal Ganglion Cell Modeling and FPGA Implementation for Robotics  [Article]

      Linares Barranco, Alejandro; Liu, Hongjie; Ríos Navarro, José Antonio; Gómez Rodríguez, Francisco de Asís; Moeys, Diederick P.; Delbruck, Tobi (MDPI, 2018)
      Taking inspiration from biology to solve engineering problems using the organizing principles of biological neural computation is the aim of the field of neuromorphic engineering. This field has demonstrated success in ...
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      CAVIAR: A 45k neuron, 5M synapse, 12G connects/s AER hardware sensory-processing-learning-actuating system for high-speed visual object recognition and tracking  [Article]

      Serrano Gotarredona, Rafael; Oster, Matthias; Lichtsteiner, Patrick; Linares Barranco, Alejandro; Paz Vicente, Rafael; Gómez Rodríguez, Francisco de Asís; Camuñas Mesa, Luis Alejandro; Berner, Raphael; Rivas Pérez, Manuel; Jiménez Moreno, Gabriel; Civit Balcells, Antón; Serrano Gotarredona, María Teresa; Acosta Jiménez, Antonio José; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 2009)
      This paper describes CAVIAR, a massively parallel hardware implementation of a spike-based sensing-processing-learning-actuating system inspired by the physiology of the nervous system. CAVIAR uses the asychronous address-event ...
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      Computer vision techniques for forest fire perception  [Article]

      Martínez de Dios, José Ramiro; Arrue Ullés, Begoña C.; Ollero Baturone, Aníbal; Merino, L.; Gómez Rodríguez, Francisco de Asís (Elsevier, 2008)
      This paper presents computer vision techniques for forest fire perception involving measurement of forest fire properties (fire front, flame height, flame inclination angle, fire base width) required for the implementation ...
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      Diseño de material específico docente para el aprendizaje de microcontroladores y sistemas USB  [Presentation]

      Jiménez Moreno, Gabriel; Jiménez Fernández, Ángel Francisco; Domínguez Morales, Manuel Jesús; Cerezuela Escudero, Elena; Cascado Caballero, Daniel; Gómez Rodríguez, Francisco de Asís; Rivas Pérez, Manuel; Linares Barranco, Alejandro (AENUI: Asociación de Enseñantes Universitarios de Informática, 2011)
      En la enseñanza en profundidad y especializada en materias de tipo informática nos encontramos con que los contenidos no paran de crecer y cada vez son más difíciles de abarcar. Por otra parte hay que empezar a pensar ...
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      Diseño e implementación de un simulador software basado en el procesador MIPS32  [Article]

      Rivas Pérez, Manuel; Domínguez Morales, Manuel Jesús; Gómez Rodríguez, Francisco de Asís; Linares Barranco, Alejandro; Jiménez Moreno, Gabriel; Civit Balcells, Antón (Universidad de Granada, 2015)
      La arquitectura de computadores es una asignatura de gran importancia actualmente en las titulaciones de Informática. Pero en muchas ocasiones, los estudiantes tienen problemas para comprender la materia debido a la falta ...
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      ED-Scorbot: A Robotic test-bed Framework for FPGA-based Neuromorphic systems  [Presentation]

      Gómez Rodríguez, Francisco de Asís; Jiménez Fernández, Ángel Francisco; Pérez Peña, Fernando; Miró Amarante, María Lourdes; Domínguez Morales, Manuel Jesús; Ríos Navarro, José Antonio; Cerezuela Escudero, Elena; Cascado Caballero, Daniel; Linares Barranco, Alejandro (IEEE Computer Society, 2016)
      Neuromorphic engineering is a growing and promising discipline nowadays. Neuro-inspiration and brain understanding applied to solve engineering problems is boosting new architectures, solutions and products today. The ...
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      FPGA Implementations Comparison of Neuro-cortical Inspired Convolution Processors for Spiking Systems  [Presentation]

      Linares Barranco, Alejandro; Paz Vicente, Rafael; Gómez Rodríguez, Francisco de Asís; Jiménez Fernández, Ángel Francisco; Rivas Pérez, Manuel; Jiménez Moreno, Gabriel; Civit Balcells, Antón (Springer, 2009)
      Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In ...
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      High-speed image processing with AER-based components  [Presentation]

      Serrano Gotarredona, Rafael; Linares Barranco, Bernabé; Serrano Gotarredona, María Teresa; Acosta Jiménez, Antonio José; Linares Barranco, Alejandro; Paz Vicente, Rafael; Gómez Rodríguez, Francisco de Asís; Jiménez Moreno, Gabriel; Civit Balcells, Antón (IEEE Computer Society, 2006)
      A high speed sample image processing application using AER-based components is presented. The setup objective is to distinguish between two propellers of different shape rotating at high speed (around 1000 revolutions/sec) ...
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      Image convolution using a probabilistic mapper on USB-AER board  [Presentation]

      Paz Vicente, Rafael; Jiménez Fernández, Ángel Francisco; Linares Barranco, Alejandro; Jiménez Moreno, Gabriel; Gómez Rodríguez, Francisco de Asís; Miró Amarante, María Lourdes; Civit Balcells, Antón (IEEE Computer Society, 2008)
      In this demo we propose a method for computing real time convolution on AER images. For that we use signed events. The AER events produced on an AER retina or an image/video to AER conversor, are processed using ...