Now showing items 1-20 of 62

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      A 0.5 /spl mu/m CMOS CNN analog random access memory chip for massive image processing 

      Carmona Galán, Ricardo; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Roska, Tamás; Kozek, Tibor; Chua, Leon O. (Institute of Electrical and Electronics Engineers, 1998)
      An analog RAM has been designed to act as a cache memory for a CNN Universal Machine. Hence, all the non-standard chips ...
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      A 0.8-μm CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage 

      Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Földesy, Péter; Zarándy, Ákos; Szolgay, Péter; Szirányi, Tamás; Roska, Tamás (Institute of Electrical and Electronics Engineers, 1997)
      This paper presents a CMOS chip for the parallel acquisition and concurrent analog processing of two-dimensional (2-D) ...
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      A 1000 FPS at 128×128 vision processor with 8-bit digitized I/O 

      Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo; Jiménez Garrido, Francisco José; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael (Institute of Electrical and Electronics Engineers, 2004)
      This paper presents a mixed-signal programmable chip for high-speed vision applications. It consists of an array of ...
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      A Bio-Inspired Two-Layer Mixed-Signal Flexible Programmable Chip for Early Vision 

      Carmona Galán, Ricardo; Jiménez Garrido, Francisco José; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Roska, Tamás; Rekeczky, Csaba; Petrás, István; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2003)
      A bio-inspired model for an analog programmable array processor (APAP), based on studies on the vertebrate retina, has ...
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      A CMOS 0.8 μm fully differential current mode buffer for HF SI circuits 

      Rosa Utrera, José Manuel de la; Pérez Verdú, Belén; Medeiro Hidalgo, Fernando; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito (Elsevier, 1998)
      We present a high-frequency fully-differential current-mode buffer to interface off-chip currents with no significant ...
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      A countinuous-time cellular neural network chip for direction-selectable connected component detection with optical image acquisition 

      Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1994)
      This paper presents a continuous-time Cellular Neural Network (CNN) chip [1] for the application of Connected Component ...
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      A mismatch-insensitive high-accuracy high-speed continuous-time current comparator in low voltage CMOS 

      Río Fernández, Rocío del; Liñán Cembrano, Gustavo; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1997)
      This paper presents a CMOS current comparator which employs nonlinear feedback to obtain high-accuracy (down to 1.5 pA) ...
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      A mixed-signal early vision chip with embedded image and programming memories and digital I/O 

      Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos (The International Society for Optical Engineering - SPIE, 2003)
      From a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-Plane Analog Programmable ...
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      A Model for VLSI implementation of CNN image processing chips using current-mode techniques 

      Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Linares Barranco, Bernabé; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1993)
      A new Cellular Neural Network model is proposed which allows simpler and faster VLSI implementation than previous models. ...
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      A multimode gray-scale CMOS optical sensor for visual computers 

      Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Roca Moreno, Elisenda (Institute of Electrical and Electronics Engineers, 2002)
      This paper presents a new multimode optical sensor architecture for the optical interface of Visual CNN (cellular neural ...
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      A one-transistor-synapse strategy for electrically-programmable massively-parallel analog array processors 

      Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Carmona Galán, Ricardo (Institute of Electrical and Electronics Engineers, 1997)
      This paper presents a linear, four-quadrants, electrically-programmable, one-transistor synapse strategy applicable to the ...
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      A processing element architecture for high-density focal plane analog programmable array processors 

      Liñán Cembrano, Gustavo; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2002)
      The architecture of the elementary Processing Element - PE- used in a recently designed 128×128 Focal Plane Analog ...
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      A prototype tool for optimum analog sizing using simulated annealing 

      Medeiro Hidalgo, Fernando; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992)
      It is shown that using simulated annealing in combination with electrical simulation provides a powerful tool allowing ...
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      A versatile sensor interface for programmable vision systems-on-chip 

      Rodríguez Vázquez, Ángel Benito; Liñán Cembrano, Gustavo; Roca Moreno, Elisenda; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael (The International Society for Optical Engineering - SPIE, 2003)
      This paper describes an optical sensor interface designed for a programmable mixed-signal vision chip. This chip has been ...
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      Accurate design of analog CNN in CMOS digital technologies 

      Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1990)
      Explores the design of cellular neural networks (CNN) by using sampled-data analog current-mode techniques which neither ...
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      ACE16K: A 128×128 focal plane analog processor with digital I/O 

      Liñán Cembrano, Gustavo; Rodríguez Vázquez, Ángel Benito; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael (Institute of Electrical and Electronics Engineers, 2002)
      This paper presents a new generation 128×128 focal-plane analog programmable array processor (FPAPAP), from a system level ...
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      ACE16k: A programmable focal plane vision processor with 128 x 128 resolution 

      Liñán Cembrano, Gustavo; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito (European Conference on Circuit Theory and Design, 2001)
      This paper presents a new generation 128x128 Focal Plane Analog Programmable Array Processor (FPAPAP), from a system ...
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      ACE16K: The Third Generation of Mixed-Signal SIMD-CNN ACE Chips Toward VSoCs 

      Rodríguez Vázquez, Ángel Benito; Liñán Cembrano, Gustavo; Carranza González, Luis; Roca Moreno, Elisenda; Carmona Galán, Ricardo; Jiménez Garrido, Francisco José; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos (Institute of Electrical and Electronics Engineers, 2004)
      Today, with 0.18-μm technologies mature and stable enough for mixed-signal design with a large variety of CMOS compatible ...
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      An 0.5-μm CMOS analog random access memory chip for TeraOPS speed multimedia video processing 

      Carmona Galán, Ricardo; Espejo Meana, Servando Carlos; Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Roska, Tamás; Kozek, Tibor; Chua, Leon O. (Institute of Electrical and Electronics Engineers, 1999)
      Data compressing, data coding, and communications in object-oriented multimedia applications like telepresence, computer-aided ...
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      Analog integrated neural-like circuits for nonlinear programming 

      Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Huertas Díaz, José Luis; Sánchez Sinencio, Edgar (Institute of Electrical and Electronics Engineers, 1989)
      A systematic approach for the design of analog neural nonlinear programming solvers using switched-capacitor (SC) integrated ...