NombreSenhadji Navarro, Raouf
DepartamentoArquitectura y Tecnología de Computadores
Área de conocimientoArquitectura y Tecnología de Computadores
Categoría profesionalProfesor Contratado Doctor
Correo electrónicoSolicitar
           
  • Nº publicaciones

    28

  • Nº visitas

    2518

  • Nº descargas

    7090


 

Artículo
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A New Approach for Implementing Finite State Machines with Input Multiplexing

García Vargas, Ignacio; Senhadji Navarro, Raouf (MDPI, 2023)
The model called Finite State Machine with Input Multiplexing (FSMIM) was proposed as a mechanism for implementing Finite ...
Artículo
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Mapping Outputs and States Encoding Bits to Outputs Using Multiplexers in Finite State Machine Implementations

Senhadji Navarro, Raouf; García Vargas, Ignacio (MDPI, 2023)
This paper proposes a new technique for implementing Finite State Machines (FSMs) in Field Programmable Gate Arrays (FPGAs). ...
Artículo
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Optimization based on the minimum maximal k-partial-matching problem of finite states machines with input multiplexing

García Vargas, Ignacio; Senhadji Navarro, Raouf (Springer, 2022)
Finite State Machines with Input Multiplexing (FSMIMs) were proposed in previous work as a technique for efficient mapping ...
Artículo
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Mapping arbitrary logic functions onto carry chains in FPGAs

Senhadji Navarro, Raouf; García Vargas, Ignacio (MDPI, 2022)
Current Field Programmable Gate Arrays (FPGAs) provide fast routing links and special logic to perform carry operations; ...
Artículo
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Methodology for Distributed-ROM-based Implementation of Finite State Machines

Senhadji Navarro, Raouf; García Vargas, Ignacio (Institute of Electrical and Electronics Engineers, 2020)
This brief explores the optimization of distributed-ROM-based Finite State Machine (FSM) implementations as an alternative ...
Artículo
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High-Performance Architecture for Binary-Tree-Based Finite State Machines

Senhadji Navarro, Raouf; García Vargas, Ignacio (IEEE Computer Society, 2018)
A binary-tree-based finite state machine (BT-FSM) is a state machine with a 1-bit input signal whose state transition graph ...
Patente
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Reconocedor reconfigurable de patrones de bits basado en jerarquía de memoria

Senhadji Navarro, Raouf; García Vargas, Ignacio (Oficina Española de Patentes y Marcas , 2016)
Reconocedor reconfigurable de patrones de bits basado en jerarquía de memoria que comprende una pluralidad de circuitos ...
Tesis Doctoral
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Máquinas de estados finitos con multiplexión de entradas: una contribución al diseño e implementación electrónica de máquinas de estados

García Vargas, Ignacio; Senhadji Navarro, Raouf (2016)
Esta tesis doctoral supone una contribución a la implementación electrónica de máquinas de estados finitos, en particular ...
Artículo
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Minimum maximum reconfiguration cost problem

Senhadji Navarro, Raouf; García Vargas, Ignacio (Springer, 2016)
This paper discusses the problem of minimizing the reconfiguration cost of some types of reconfigurable systems. A formal ...
Artículo
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Finite State Machines With Input Multiplexing: A Performance Study

García Vargas, Ignacio; Senhadji Navarro, Raouf (IEEE Computer Society, 2015)
Finite state machines with input multiplexing (FSMIMs) have been proposed in previous works as a technique for efficient mapping ...
Artículo
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The minimum maximal k-partial-matching problem

García Vargas, Ignacio; Senhadji Navarro, Raouf (Springer, 2013)
In this paper, we introduce a new problem related to bipartite graphs called minimum maximal k-partial-matching (MMKPM) ...
Artículo
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Finite Virtual State Machines

Senhadji Navarro, Raouf; García Vargas, Ignacio (Institute of Electronics, Information and Communication Engineers, 2012)
This letter proposes a new model of state machine called Finite Virtual State Machine (FVSM). A memory-based architecture ...
Ponencia
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Performance Evaluation of RAM-Based Implementation of Finite State Machines in FPGAs

Senhadji Navarro, Raouf; García Vargas, Ignacio; Guisado Lízar, José Luís (IEEE Computer Society, 2012)
This paper presents a study of performance of RAM-based implementations in FPGAs of Finite State Machines (FSMs). The ...
Ponencia
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ROM-Based Finite State Machine Implementation in Low Cost FPGAs

García Vargas, Ignacio; Senhadji Navarro, Raouf; Jiménez Moreno, Gabriel; Civit Balcells, Antón; Guerra Gutiérrez, P. (IEE, 2007)
This work presents a technique for the resource optimization of input multiplexed ROM-based Finite State Machines. This ...
Ponencia
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FPGA-Based Implementation of RAM with Asymmetric Port Widths for Run-Time Reconfiguration

Senhadji Navarro, Raouf; García Vargas, Ignacio; Jiménez Moreno, Gabriel; Civit Balcells, Antón (IEEE Computer Society, 2007)
In this paper, we present a HDL description of a RAM with asymmetric port widths which allows read and write operations ...
Ponencia
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Propuesta para la elaboración de prácticas de codiseño de bajo coste

Guerra Gutiérrez, P.; García Vargas, Ignacio; Senhadji Navarro, Raouf; Jiménez Moreno, Gabriel (Universidad Politécnica de Madrid, 2006)
En esta comunicación se presenta una propuesta para la elaboración de prácticas de sistemas digitales basados en codiseño. ...
Artículo
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ROM-based FSM implementation using input multiplexing in FPGA devices

Senhadji Navarro, Raouf; García Vargas, Ignacio; Jiménez Moreno, Gabriel; Civit Balcells, Antón (IET Digital Library, 2004)
A new approach for ROM implementation of finite state machines (FSMs) is proposed, based on the selection of a subset of ...
Artículo
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Hardware/software codesign of configurable fuzzy control systems

Cabrera, A.; Sánchez Solano, Santiago; Brox, P.; Barriga Barros, Ángel; Senhadji Navarro, Raouf (Elsevier, 2004)
Fuzzy inference techniques are an attractive and well-established approach for solving control problems. This is mainly due ...
Ponencia
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Synthetic generation of address-events for real-time image processing

Linares Barranco, Alejandro; Senhadji Navarro, Raouf; García Vargas, Ignacio; Gómez Rodríguez, Francisco de Asís; Jiménez Moreno, Gabriel; Civit Balcells, Antón (IEEE Computer Society, 2003)
Address-event-representation (AER) is a communication protocol that emulates the nervous system's neurons communication, ...
Ponencia
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Thing Complex Fuzzy Systems by Supervised Learning Algorithms

Moreno Velo, Francisco José; Baturone, I.; Senhadji Navarro, Raouf; Sánchez Solano, Santiago (IEEE Computer Society, 2003)
Tuning a fuzzy system to meet a given set of inpuffoutput patterns is usually a difficult task that involves many ...
Ponencia
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NORFREA: An algorithm for non redundant fuzzy rule extraction

Senhadji Navarro, Raouf; Sánchez Solano, Santiago; Barriga Barros, Ángel; Baturone Castillo, María Iluminada; Moreno Velo, Francisco José (Institute of Electrical and Electronics Engineers (IEEE), 2002)
This contribution presents a new algorithm (NORFREA) to select fuzzy rules from a grid partition of the input domain. ...
Ponencia
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Prototyping of fuzzy logic–based controllers using standard FPGA development boards

Sánchez Solano, Santiago; Senhadji Navarro, Raouf; Cabrera, Alejandro; Baturone Castillo, María Iluminada; Jiménez Fernández, Carlos Jesús (2002)
This paper describes a design methodology for fuzzy logic-based control systems. The methodology employs hardware/software ...
Ponencia
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Codiseño hardware/software de un sistema de dosificación basado en lógica difusa

Cabrera, A.; Sánchez Solano, Santiago; Senhadji Navarro, Raouf; Barriga Barros, Ángel (Universidad Politécnica de Madrid, 2002)
En esta comunicación se describe la realización mediante codiseño hardware/software de un sistema de dosificación que ...
Ponencia
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Hardware/software codesign methodology for fuzzy controller implementation

Cabrera, Alejandro; Sánchez Solano, Santiago; Senhadji Navarro, Raouf; Barriga Barros, Ángel; Jiménez Fernández, Carlos Jesús (Institute of Electrical and Electronics Engineers, 2002)
This paper describes a HW/SW codesign methodology for the implementation of fuzzy controllers on a platform composed by a ...
Ponencia
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Development of level controllers based on fuzzy logic

Cabrera, Alejandro; Senhadji Navarro, Raouf; Sánchez Solano, Santiago; Barriga Barros, Ángel; Jiménez Fernández, Carlos Jesús; Llanes, Orestes (2002)
This paper describes the development of different kinds of level controllers based on fuzzy logic. Designs and implementations ...
Ponencia
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VLSI design of universal approximator neuro-fuzzy systems

Baturone Castillo, María Iluminada; Sánchez Solano, Santiago; Barriga Barros, Ángel; Jiménez Fernández, Carlos Jesús; Senhadji Navarro, Raouf; López, Diego R. (2001)
Neuro-fuzzy systems can theoretically solve any problem since they are universal approximators. Besides, they combine the ...
Ponencia
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Síntesis hardware de sistemas difusos mediante el entorno de desarrollo Xfuzzy

Barriga Barros, Ángel; Baturone Castillo, María Iluminada; Sánchez Solano, Santiago; Senhadji Navarro, Raouf (Universidad Politécnica de Madrid, 2000)
Ponencia
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A design methodology for application specific fuzzy integrated circuits

Barriga Barros, Ángel; Senhadji Navarro, Raouf; Jiménez Fernández, Carlos Jesús; Baturone Castillo, María Iluminada; Sánchez Solano, Santiago (1998)
The main objective of this contribution is to present a design methodology for application specific fuzzy integrated ...